XC1765D-DD8M vs XC1765EDD8M feature comparison

XC1765D-DD8M AMD Xilinx

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XC1765EDD8M AMD Xilinx

Buy Now Datasheet
Pbfree Code No No
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code DIP DIP
Package Description CERAMIC, DIP-8 CERAMIC, DIP-8
Pin Count 8 8
Reach Compliance Code unknown compliant
ECCN Code 3A001.A.2.C 3A001.A.2.C
HTS Code 8542.32.00.51 8542.32.00.61
Additional Feature USED FOR STORING THE CONFIGURATION BITSTREAMS OF XILINX FPGAS
Clock Frequency-Max (fCLK) 5 MHz 5 MHz
I/O Type COMMON COMMON
JESD-30 Code R-GDIP-T8 R-CDIP-T8
JESD-609 Code e0 e0
Length 9.906 mm 10.16 mm
Memory Density 65536 bit 65536 bit
Memory IC Type CONFIGURATION MEMORY CONFIGURATION MEMORY
Memory Width 1 1
Number of Functions 1 1
Number of Terminals 8 8
Number of Words 65536 words 65536 words
Number of Words Code 64000 64000
Operating Mode SYNCHRONOUS SYNCHRONOUS
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -55 °C -55 °C
Organization 64KX1 64KX1
Output Characteristics 3-STATE 3-STATE
Package Body Material CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED
Package Code DIP DIP
Package Equivalence Code DIP8,.3 DIP8,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial SERIAL SERIAL
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.318 mm 5.08 mm
Standby Current-Max 0.0015 A 0.0015 A
Supply Current-Max 0.01 mA 0.01 mA
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade MILITARY MILITARY
Terminal Finish TIN LEAD TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 1

Compare XC1765D-DD8M with alternatives

Compare XC1765EDD8M with alternatives