Findchips: Compare 74HC132PW-Q100,118 vs CD74HCT00E

74HC132PW-Q100,118 vs CD74HCT00E feature comparison

Buy Now Datasheet

Buy Now Datasheet

Rohs Code	Yes	No
Part Life Cycle Code	Active	Transferred
Ihs Manufacturer	NEXPERIA	GENERAL ELECTRIC SOLID STATE
Part Package Code	TSSOP
Package Description	4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14	DIP-14
Pin Count	14
Manufacturer Package Code	SOT402-1
Reach Compliance Code	compliant	unknown
Factory Lead Time	6 Weeks
Samacsys Manufacturer	Nexperia
Family	HC/UH
JESD-30 Code	R-PDSO-G14	R-PDIP-T14
JESD-609 Code	e4
Length	5 mm
Logic IC Type	NAND GATE	NAND GATE
Moisture Sensitivity Level	1
Number of Functions	4
Number of Inputs	2
Number of Terminals	14	14
Operating Temperature-Max	125 °C	125 °C
Operating Temperature-Min	-40 °C	-55 °C
Package Body Material	PLASTIC/EPOXY	PLASTIC/EPOXY
Package Code	TSSOP	DIP
Package Shape	RECTANGULAR	RECTANGULAR
Package Style	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	IN-LINE
Packing Method	TR, 13 INCH
Peak Reflow Temperature (Cel)	260
Propagation Delay (tpd)	190 ns
Screening Level	AEC-Q100
Seated Height-Max	1.1 mm
Supply Voltage-Max (Vsup)	6 V
Supply Voltage-Min (Vsup)	2 V
Supply Voltage-Nom (Vsup)	5 V	5 V
Surface Mount	YES	NO
Technology	CMOS	CMOS
Temperature Grade	AUTOMOTIVE	MILITARY
Terminal Finish	NICKEL PALLADIUM GOLD SILVER
Terminal Form	GULL WING	THROUGH-HOLE
Terminal Pitch	0.65 mm	2.54 mm
Terminal Position	DUAL	DUAL
Time@Peak Reflow Temperature-Max (s)	30
Width	4.4 mm
Base Number Matches	2	7
HTS Code		8542.39.00.01
Load Capacitance (CL)		50 pF
Max I(ol)		0.004 A
Package Equivalence Code		DIP14,.3
Prop. Delay@Nom-Sup		30 ns
Qualification Status		Not Qualified
Schmitt Trigger		NO
	Logic » Gates	Logic » Gates