74HC132PW-Q100 vs 74HC132PW-T feature comparison

74HC132PW-Q100 Nexperia

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74HC132PW-T NXP Semiconductors

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Rohs Code Yes Yes
Part Life Cycle Code Active Obsolete
Ihs Manufacturer NEXPERIA NXP SEMICONDUCTORS
Package Description , SOT-402-1, TSSOP-14
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Date Of Intro 2017-02-01
JESD-609 Code e4 e4
Logic IC Type NAND GATE NAND GATE
Moisture Sensitivity Level 1 1
Peak Reflow Temperature (Cel) 260 260
Screening Level AEC-Q100
Terminal Finish NICKEL PALLADIUM GOLD SILVER Nickel/Palladium/Gold (Ni/Pd/Au)
Time@Peak Reflow Temperature-Max (s) 30 30
Base Number Matches 2 1
Part Package Code TSSOP
Pin Count 14
Family HC/UH
JESD-30 Code R-PDSO-G14
Length 5 mm
Load Capacitance (CL) 50 pF
Number of Functions 4
Number of Inputs 2
Number of Terminals 14
Operating Temperature-Max 125 °C
Operating Temperature-Min -40 °C
Package Body Material PLASTIC/EPOXY
Package Code TSSOP
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing Method TR
Propagation Delay (tpd) 38 ns
Qualification Status Not Qualified
Seated Height-Max 1.1 mm
Supply Voltage-Max (Vsup) 6 V
Supply Voltage-Min (Vsup) 2 V
Supply Voltage-Nom (Vsup) 5 V
Surface Mount YES
Technology CMOS
Temperature Grade AUTOMOTIVE
Terminal Form GULL WING
Terminal Pitch 0.65 mm
Terminal Position DUAL
Width 4.4 mm

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