74HCT132D-Q100 vs 74HC132D-T feature comparison

74HCT132D-Q100 Nexperia

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74HC132D-T Philips Semiconductors

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Source Content uid 74HCT132D-Q100
Rohs Code Yes Yes
Part Life Cycle Code Active Transferred
Package Description , SOP, SOP14,.25
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01 8542.39.00.01
Date Of Intro 2017-02-01
JESD-609 Code e4 e4
Logic IC Type NAND GATE NAND GATE
Moisture Sensitivity Level 1
Peak Reflow Temperature (Cel) NOT SPECIFIED
Terminal Finish Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag) Nickel/Palladium/Gold (Ni/Pd/Au)
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Number Matches 2 2
JESD-30 Code R-PDSO-G14
Load Capacitance (CL) 50 pF
Max I(ol) 0.004 A
Number of Terminals 14
Operating Temperature-Max 85 °C
Operating Temperature-Min -40 °C
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Equivalence Code SOP14,.25
Package Shape RECTANGULAR
Package Style SMALL OUTLINE
Packing Method TAPE AND REEL
Power Supplies 2/6 V
Prop. Delay@Nom-Sup 31 ns
Qualification Status Not Qualified
Schmitt Trigger YES
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Form GULL WING
Terminal Pitch 1.27 mm
Terminal Position DUAL

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