74HCT132D-Q100 vs CD74HC132EX feature comparison

74HCT132D-Q100 Nexperia

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CD74HC132EX Harris Semiconductor

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Rohs Code Yes No
Part Life Cycle Code Active Obsolete
Ihs Manufacturer NEXPERIA HARRIS SEMICONDUCTOR
Package Description , DIP, DIP14,.3
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01 8542.39.00.01
Date Of Intro 2017-02-01
kg CO2e/kg 12.4 12.4
Average Weight (mg) 215.8 1630.6
CO2e (mg) 2675.92 20219.441
JESD-609 Code e4 e0
Logic IC Type NAND GATE NAND GATE
Moisture Sensitivity Level 1
Peak Reflow Temperature (Cel) 260
Screening Level AEC-Q100
Terminal Finish NICKEL PALLADIUM GOLD SILVER TIN LEAD
Time@Peak Reflow Temperature-Max (s) 30
Base Number Matches 2 2
Family HC/UH
JESD-30 Code R-PDIP-T14
Load Capacitance (CL) 50 pF
Max I(ol) 0.004 A
Number of Functions 4
Number of Inputs 2
Number of Terminals 14
Operating Temperature-Max 125 °C
Operating Temperature-Min -55 °C
Package Body Material PLASTIC/EPOXY
Package Code DIP
Package Equivalence Code DIP14,.3
Package Shape RECTANGULAR
Package Style IN-LINE
Prop. Delay@Nom-Sup 38 ns
Qualification Status Not Qualified
Schmitt Trigger YES
Supply Voltage-Max (Vsup) 6 V
Supply Voltage-Min (Vsup) 2 V
Supply Voltage-Nom (Vsup) 5 V
Surface Mount NO
Technology CMOS
Temperature Grade MILITARY
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL

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