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74LV132PW,118 vs 74LV132PW-Q100J feature comparison

74LV132PW,118 NXP Semiconductors

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74LV132PW-Q100J NXP Semiconductors

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Rohs Code Yes
Part Life Cycle Code Transferred Transferred
Ihs Manufacturer NXP SEMICONDUCTORS NXP SEMICONDUCTORS
Part Package Code TSSOP TSSOP
Package Description 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14
Pin Count 14 14
Manufacturer Package Code SOT402-1 SOT402-1
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01
Family LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 Code R-PDSO-G14 R-PDSO-G14
JESD-609 Code e4
Length 5 mm 5 mm
Load Capacitance (CL) 50 pF
Logic IC Type NAND GATE NAND GATE
Max I(ol) 0.006 A
Moisture Sensitivity Level 1
Number of Functions 4 4
Number of Inputs 2 2
Number of Terminals 14 14
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Equivalence Code TSSOP14,.25
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing Method TR
Peak Reflow Temperature (Cel) 260
Prop. Delay@Nom-Sup 25 ns
Propagation Delay (tpd) 43 ns 43 ns
Qualification Status Not Qualified
Schmitt Trigger YES
Seated Height-Max 1.1 mm 1.1 mm
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 1 V 1 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade AUTOMOTIVE AUTOMOTIVE
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.65 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 4.4 mm 4.4 mm
Base Number Matches 2 2
Screening Level AEC-Q100
Logic » Gates
Logic » Gates

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