74LVC10APW-T vs 74LVC10PW feature comparison

74LVC10APW-T Philips Semiconductors

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74LVC10PW Philips Semiconductors

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Rohs Code Yes No
Part Life Cycle Code Transferred Transferred
Ihs Manufacturer PHILIPS SEMICONDUCTORS PHILIPS SEMICONDUCTORS
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
JESD-30 Code R-PDSO-G14 R-PDSO-G14
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type NAND GATE NAND GATE
Max I(ol) 0.024 A 0.024 A
Number of Terminals 14 14
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Equivalence Code TSSOP14,.25 TSSOP14,.25
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing Method TR
Peak Reflow Temperature (Cel) 260
Prop. Delay@Nom-Sup 5.7 ns 7.5 ns
Qualification Status Not Qualified Not Qualified
Schmitt Trigger NO NO
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 0.635 mm 0.635 mm
Terminal Position DUAL DUAL
Base Number Matches 2 2
JESD-609 Code e0
Terminal Finish Tin/Lead (Sn/Pb)