74LVC14APW-T118 vs 74LVC14APW-Q100 feature comparison

74LVC14APW-T118 NXP Semiconductors

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74LVC14APW-Q100 Nexperia

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Part Life Cycle Code Active Active
Ihs Manufacturer NXP SEMICONDUCTORS NEXPERIA
Package Description TSSOP, TSSOP,
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family LVC/LCX/Z LVC/LCX/Z
JESD-30 Code R-PDSO-G14 R-PDSO-G14
Length 5 mm 5 mm
Logic IC Type INVERTER INVERTER
Number of Functions 6 6
Number of Inputs 1 1
Number of Terminals 14 14
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd) 10 ns 14.7 ns
Seated Height-Max 1.1 mm 1.1 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 1.2 V 1.2 V
Supply Voltage-Nom (Vsup) 2.7 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade AUTOMOTIVE AUTOMOTIVE
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.65 mm
Terminal Position DUAL DUAL
Width 4.4 mm 4.4 mm
Base Number Matches 1 2
Rohs Code Yes
Date Of Intro 2017-02-01
JESD-609 Code e4
Moisture Sensitivity Level 1
Peak Reflow Temperature (Cel) 260
Screening Level AEC-Q100
Terminal Finish NICKEL PALLADIUM GOLD SILVER
Time@Peak Reflow Temperature-Max (s) 30

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Compare 74LVC14APW-Q100 with alternatives