74LVC2G14GW vs 74LVC2G14GW-Q100,125 feature comparison

74LVC2G14GW Philips Semiconductors

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74LVC2G14GW-Q100,125 NXP Semiconductors

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Rohs Code Yes
Part Life Cycle Code Transferred Active
Ihs Manufacturer PHILIPS SEMICONDUCTORS NXP SEMICONDUCTORS
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
JESD-30 Code R-PDSO-G6 R-PDSO-G6
JESD-609 Code e3
Logic IC Type INVERTER INVERTER
Max I(ol) 0.024 A
Moisture Sensitivity Level 1
Number of Terminals 6 6
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Equivalence Code TSSOP6,.08
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing Method TR
Peak Reflow Temperature (Cel) 260
Qualification Status Not Qualified
Schmitt Trigger YES
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade AUTOMOTIVE AUTOMOTIVE
Terminal Finish MATTE TIN
Terminal Form GULL WING GULL WING
Terminal Pitch 0.635 mm 0.65 mm
Terminal Position DUAL DUAL
Base Number Matches 3 1
Package Description TSSOP,
Family LVC/LCX/Z
Length 2 mm
Number of Functions 2
Number of Inputs 1
Propagation Delay (tpd) 12 ns
Screening Level AEC-Q100
Seated Height-Max 1.1 mm
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 1.65 V
Width 1.25 mm

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