CD54HCT00F3A vs HD74HC132RPEL feature comparison

CD54HCT00F3A Harris Semiconductor

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HD74HC132RPEL Renesas Electronics Corporation

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Rohs Code No Yes
Part Life Cycle Code Transferred Obsolete
Ihs Manufacturer HARRIS SEMICONDUCTOR RENESAS ELECTRONICS CORP
Package Description DIP, DIP14,.3 SOP, SOP14,.25
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family HCT HC/UH
JESD-30 Code R-GDIP-T14 R-PDSO-G14
JESD-609 Code e0
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type NAND GATE NAND GATE
Max I(ol) 0.004 A 0.004 A
Number of Functions 4 4
Number of Inputs 2 2
Number of Terminals 14 14
Operating Temperature-Max 125 °C 85 °C
Operating Temperature-Min -55 °C -40 °C
Package Body Material CERAMIC, GLASS-SEALED PLASTIC/EPOXY
Package Code DIP SOP
Package Equivalence Code DIP14,.3 SOP14,.25
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE SMALL OUTLINE
Prop. Delay@Nom-Sup 30 ns 25 ns
Qualification Status Not Qualified Not Qualified
Schmitt Trigger NO YES
Screening Level 38535Q/M;38534H;883B
Supply Voltage-Max (Vsup) 5.5 V 6 V
Supply Voltage-Min (Vsup) 4.5 V 2 V
Supply Voltage-Nom (Vsup) 5 V 4.5 V
Surface Mount NO YES
Technology CMOS CMOS
Temperature Grade MILITARY INDUSTRIAL
Terminal Finish Tin/Lead (Sn/Pb)
Terminal Form THROUGH-HOLE GULL WING
Terminal Pitch 2.54 mm 1.27 mm
Terminal Position DUAL DUAL
Base Number Matches 4 1
Pbfree Code Yes
Part Package Code SOIC
Pin Count 14
Length 8.65 mm
Moisture Sensitivity Level 1
Packing Method TR
Peak Reflow Temperature (Cel) 260
Propagation Delay (tpd) 125 ns
Seated Height-Max 1.75 mm
Time@Peak Reflow Temperature-Max (s) 20
Width 3.95 mm

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