CD74HC541E
vs
HD74LVC541AFP
feature comparison
| Rohs Code |
No
|
Yes
|
| Part Life Cycle Code |
Obsolete
|
Transferred
|
| Ihs Manufacturer |
INTERSIL CORP
|
HITACHI LTD
|
| Package Description |
DIP-20
|
SOP, SOP20,.4
|
| Reach Compliance Code |
not_compliant
|
unknown
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| Control Type |
ENABLE LOW
|
ENABLE LOW
|
| JESD-30 Code |
R-PDIP-T20
|
R-PDSO-G20
|
| JESD-609 Code |
e0
|
|
| Load Capacitance (CL) |
50 pF
|
50 pF
|
| Logic IC Type |
BUS DRIVER
|
BUS DRIVER
|
| Max I(ol) |
0.006 A
|
0.024 A
|
| Number of Bits |
8
|
8
|
| Number of Functions |
1
|
1
|
| Number of Ports |
2
|
2
|
| Number of Terminals |
20
|
20
|
| Operating Temperature-Max |
125 °C
|
85 °C
|
| Operating Temperature-Min |
-55 °C
|
-40 °C
|
| Output Characteristics |
3-STATE
|
3-STATE
|
| Output Polarity |
TRUE
|
TRUE
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
DIP
|
SOP
|
| Package Equivalence Code |
DIP20,.3
|
SOP20,.4
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
IN-LINE
|
SMALL OUTLINE
|
| Prop. Delay@Nom-Sup |
35 ns
|
6.5 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Surface Mount |
NO
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
MILITARY
|
INDUSTRIAL
|
| Terminal Finish |
Tin/Lead (Sn/Pb)
|
|
| Terminal Form |
THROUGH-HOLE
|
GULL WING
|
| Terminal Pitch |
2.54 mm
|
1.27 mm
|
| Terminal Position |
DUAL
|
DUAL
|
| Base Number Matches |
2
|
1
|
| Part Package Code |
|
SOIC
|
| Pin Count |
|
20
|
| Additional Feature |
|
WITH DUAL OUTPUT ENABLE
|
| Family |
|
LVC/LCX/Z
|
| Length |
|
12.6 mm
|
| Moisture Sensitivity Level |
|
1
|
| Peak Reflow Temperature (Cel) |
|
260
|
| Propagation Delay (tpd) |
|
7.5 ns
|
| Seated Height-Max |
|
2.2 mm
|
| Supply Voltage-Max (Vsup) |
|
5.5 V
|
| Supply Voltage-Min (Vsup) |
|
2 V
|
| Supply Voltage-Nom (Vsup) |
|
2.7 V
|
| Time@Peak Reflow Temperature-Max (s) |
|
20
|
| Width |
|
5.5 mm
|
|
|
|
Compare CD74HC541E with alternatives
Compare HD74LVC541AFP with alternatives