CY7C373-20JC
vs
CY7C342-35GI
feature comparison
| Rohs Code |
No
|
No
|
| Part Life Cycle Code |
Obsolete
|
Obsolete
|
| Ihs Manufacturer |
CYPRESS SEMICONDUCTOR CORP
|
CYPRESS SEMICONDUCTOR CORP
|
| Reach Compliance Code |
not_compliant
|
not_compliant
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| Additional Feature |
NO
|
LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
|
| In-System Programmable |
NO
|
NO
|
| JESD-30 Code |
S-PQCC-J84
|
S-CPGA-P68
|
| JESD-609 Code |
e0
|
e0
|
| JTAG BST |
NO
|
NO
|
| Number of Macro Cells |
64
|
128
|
| Number of Terminals |
84
|
68
|
| Operating Temperature-Max |
70 °C
|
85 °C
|
| Operating Temperature-Min |
|
-40 °C
|
| Package Body Material |
PLASTIC/EPOXY
|
CERAMIC, METAL-SEALED COFIRED
|
| Package Code |
QCCJ
|
PGA
|
| Package Equivalence Code |
LDCC84,1.2SQ
|
PGA68,11X11
|
| Package Shape |
SQUARE
|
SQUARE
|
| Package Style |
CHIP CARRIER
|
GRID ARRAY
|
| Programmable Logic Type |
FLASH PLD
|
OT PLD
|
| Propagation Delay |
20 ns
|
75 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Supply Voltage-Nom |
5 V
|
5 V
|
| Surface Mount |
YES
|
NO
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
COMMERCIAL
|
INDUSTRIAL
|
| Terminal Finish |
TIN LEAD
|
TIN LEAD
|
| Terminal Form |
J BEND
|
PIN/PEG
|
| Terminal Pitch |
1.27 mm
|
2.54 mm
|
| Terminal Position |
QUAD
|
PERPENDICULAR
|
| Base Number Matches |
1
|
1
|
| Part Package Code |
|
PGA
|
| Package Description |
|
CAVITY-DOWN, CERAMIC, PGA-68
|
| Pin Count |
|
68
|
| Clock Frequency-Max |
|
22.2 MHz
|
| Length |
|
27.94 mm
|
| Number of Dedicated Inputs |
|
7
|
| Number of I/O Lines |
|
52
|
| Organization |
|
7 DEDICATED INPUTS, 52 I/O
|
| Output Function |
|
MACROCELL
|
| Seated Height-Max |
|
2.667 mm
|
| Supply Voltage-Max |
|
5.5 V
|
| Supply Voltage-Min |
|
4.5 V
|
| Width |
|
27.94 mm
|
|
|
|
Compare CY7C373-20JC with alternatives
Compare CY7C342-35GI with alternatives