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DV4013BD vs HEF4013BT,653 feature comparison

DV4013BD avg Semiconductors

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HEF4013BT,653 NXP Semiconductors

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Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer AVG SEMICONDUCTORS NXP SEMICONDUCTORS
Part Package Code SOIC SOIC
Package Description SOP, PLASTIC, SOT-108, SO-14
Pin Count 14 14
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family 4000/14000/40000 4000/14000/40000
JESD-30 Code R-PDSO-G14 R-PDSO-G14
Length 8.65 mm 8.65 mm
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type D FLIP-FLOP D FLIP-FLOP
Number of Bits 1 1
Number of Functions 2 2
Number of Terminals 14 14
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Polarity COMPLEMENTARY COMPLEMENTARY
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SOP SOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Propagation Delay (tpd) 350 ns 220 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.75 mm 1.75 mm
Supply Voltage-Max (Vsup) 18 V 15 V
Supply Voltage-Min (Vsup) 3 V 3 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position DUAL DUAL
Trigger Type POSITIVE EDGE POSITIVE EDGE
Width 3.9 mm 3.9 mm
fmax-Min 7 MHz 7 MHz
Base Number Matches 1 2
Rohs Code Yes
Manufacturer Package Code SOT108-1
JESD-609 Code e4
Max Frequency@Nom-Sup 7000000 Hz
Moisture Sensitivity Level 1
Package Equivalence Code SOP14,.25
Packing Method TR
Peak Reflow Temperature (Cel) 260
Prop. Delay@Nom-Sup 220 ns
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Time@Peak Reflow Temperature-Max (s) 30
Logic » FF/Latches
Logic » FF/Latches

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