EP1K50QC208-3N vs EP1K50QI208-2 feature comparison

EP1K50QC208-3N Altera Corporation

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EP1K50QI208-2 Altera Corporation

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Pbfree Code Yes No
Rohs Code Yes No
Part Life Cycle Code Transferred Transferred
Ihs Manufacturer ALTERA CORP ALTERA CORP
Part Package Code QFP QFP
Package Description PLASTIC, QFP-208 PLASTIC, QFP-208
Pin Count 208 208
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Samacsys Manufacturer Intel Intel
JESD-30 Code S-PQFP-G208 S-PQFP-G208
JESD-609 Code e3 e0
Length 28 mm 28 mm
Moisture Sensitivity Level 3 3
Number of I/O Lines 147 147
Number of Inputs 147 147
Number of Logic Cells 2880 2880
Number of Outputs 147 147
Number of Terminals 208 208
Operating Temperature-Max 70 °C 85 °C
Operating Temperature-Min -40 °C
Organization 147 I/O 147 I/O
Output Function MIXED MIXED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code FQFP FQFP
Package Equivalence Code QFP208,1.2SQ,20 QFP208,1.2SQ,20
Package Shape SQUARE SQUARE
Package Style FLATPACK, FINE PITCH FLATPACK, FINE PITCH
Peak Reflow Temperature (Cel) 245 220
Programmable Logic Type LOADABLE PLD LOADABLE PLD
Propagation Delay 0.5 ns 0.4 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.1 mm 4.1 mm
Supply Voltage-Max 2.625 V 2.625 V
Supply Voltage-Min 2.375 V 2.375 V
Supply Voltage-Nom 2.5 V 2.5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL INDUSTRIAL
Terminal Finish MATTE TIN TIN LEAD
Terminal Form GULL WING GULL WING
Terminal Pitch 0.5 mm 0.5 mm
Terminal Position QUAD QUAD
Time@Peak Reflow Temperature-Max (s) 30 20
Width 28 mm 28 mm
Base Number Matches 1 6
Clock Frequency-Max 833 MHz
In-System Programmable NO
JTAG BST YES

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