EP20K100EFI144-2X
vs
EP20K100EFC144-2N
feature comparison
Pbfree Code |
No
|
Yes
|
Rohs Code |
No
|
Yes
|
Part Life Cycle Code |
Transferred
|
Transferred
|
Ihs Manufacturer |
ALTERA CORP
|
ALTERA CORP
|
Part Package Code |
BGA
|
BGA
|
Package Description |
FINE LINE, BGA-144
|
FINE LINE, BGA-144
|
Pin Count |
144
|
144
|
Reach Compliance Code |
not_compliant
|
unknown
|
HTS Code |
8542.39.00.01
|
8542.39.00.01
|
JESD-30 Code |
S-PBGA-B144
|
S-PBGA-B144
|
JESD-609 Code |
e0
|
e1
|
Length |
13 mm
|
13 mm
|
Moisture Sensitivity Level |
3
|
3
|
Number of Dedicated Inputs |
4
|
4
|
Number of I/O Lines |
93
|
93
|
Number of Inputs |
85
|
85
|
Number of Logic Cells |
4160
|
4160
|
Number of Outputs |
85
|
85
|
Number of Terminals |
144
|
144
|
Organization |
4 DEDICATED INPUTS, 93 I/O
|
4 DEDICATED INPUTS, 93 I/O
|
Output Function |
MACROCELL
|
MACROCELL
|
Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
Package Code |
LBGA
|
LBGA
|
Package Equivalence Code |
BGA144,12X12,40
|
BGA144,12X12,40
|
Package Shape |
SQUARE
|
SQUARE
|
Package Style |
GRID ARRAY, LOW PROFILE
|
GRID ARRAY, LOW PROFILE
|
Peak Reflow Temperature (Cel) |
235
|
260
|
Programmable Logic Type |
LOADABLE PLD
|
LOADABLE PLD
|
Propagation Delay |
2.02 ns
|
2.02 ns
|
Qualification Status |
Not Qualified
|
Not Qualified
|
Seated Height-Max |
1.7 mm
|
1.7 mm
|
Supply Voltage-Max |
1.89 V
|
1.89 V
|
Supply Voltage-Min |
1.71 V
|
1.71 V
|
Supply Voltage-Nom |
1.8 V
|
1.8 V
|
Surface Mount |
YES
|
YES
|
Technology |
CMOS
|
CMOS
|
Terminal Finish |
TIN LEAD
|
TIN SILVER COPPER
|
Terminal Form |
BALL
|
BALL
|
Terminal Pitch |
1 mm
|
1 mm
|
Terminal Position |
BOTTOM
|
BOTTOM
|
Time@Peak Reflow Temperature-Max (s) |
20
|
30
|
Width |
13 mm
|
13 mm
|
Base Number Matches |
2
|
1
|
Clock Frequency-Max |
|
160 MHz
|
Operating Temperature-Max |
|
85 °C
|
Operating Temperature-Min |
|
|
Temperature Grade |
|
OTHER
|
|
|
|
Compare EP20K100EFI144-2X with alternatives
Compare EP20K100EFC144-2N with alternatives