EP224PC-12
vs
GAL20V8A-20LPIB
feature comparison
| Pbfree Code |
No
|
|
| Rohs Code |
No
|
|
| Part Life Cycle Code |
Obsolete
|
Obsolete
|
| Ihs Manufacturer |
ALTERA CORP
|
LATTICE SEMICONDUCTOR CORP
|
| Part Package Code |
DIP
|
DIP
|
| Package Description |
PLASTIC, DIP-24
|
DIP,
|
| Pin Count |
24
|
24
|
| Reach Compliance Code |
unknown
|
unknown
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| Additional Feature |
8 MACROCELLS
|
|
| Architecture |
PAL-TYPE
|
|
| Clock Frequency-Max |
90.9 MHz
|
33.3 MHz
|
| JESD-30 Code |
R-PDIP-T24
|
R-PDIP-T24
|
| JESD-609 Code |
e0
|
|
| Length |
31.6865 mm
|
31.75 mm
|
| Number of Dedicated Inputs |
13
|
10
|
| Number of I/O Lines |
8
|
8
|
| Number of Inputs |
22
|
|
| Number of Outputs |
8
|
|
| Number of Product Terms |
72
|
|
| Number of Terminals |
24
|
24
|
| Operating Temperature-Max |
70 °C
|
85 °C
|
| Operating Temperature-Min |
|
-40 °C
|
| Organization |
13 DEDICATED INPUTS, 8 I/O
|
10 DEDICATED INPUTS, 8 I/O
|
| Output Function |
MACROCELL
|
MACROCELL
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
DIP
|
DIP
|
| Package Equivalence Code |
DIP24,.3
|
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
IN-LINE
|
IN-LINE
|
| Peak Reflow Temperature (Cel) |
220
|
|
| Programmable Logic Type |
OT PLD
|
EE PLD
|
| Propagation Delay |
12 ns
|
20 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
4.318 mm
|
5.08 mm
|
| Supply Voltage-Max |
5.25 V
|
5.5 V
|
| Supply Voltage-Min |
4.75 V
|
4.5 V
|
| Supply Voltage-Nom |
5 V
|
5 V
|
| Surface Mount |
NO
|
NO
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
COMMERCIAL
|
INDUSTRIAL
|
| Terminal Finish |
TIN LEAD
|
|
| Terminal Form |
THROUGH-HOLE
|
THROUGH-HOLE
|
| Terminal Pitch |
2.54 mm
|
2.54 mm
|
| Terminal Position |
DUAL
|
DUAL
|
| Width |
7.62 mm
|
7.62 mm
|
| Base Number Matches |
1
|
1
|
|
|
|
Compare EP224PC-12 with alternatives
Compare GAL20V8A-20LPIB with alternatives