EP2C50F672I8N
vs
EP2C50F672C8
feature comparison
| Pbfree Code |
Yes
|
|
| Rohs Code |
Yes
|
No
|
| Part Life Cycle Code |
Transferred
|
Active
|
| Ihs Manufacturer |
ALTERA CORP
|
INTEL CORP
|
| Part Package Code |
BGA
|
|
| Package Description |
LEAD FREE, FBGA-672
|
FBGA-672
|
| Pin Count |
672
|
|
| Reach Compliance Code |
unknown
|
compliant
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| Samacsys Manufacturer |
Intel
|
|
| Additional Feature |
ALSO REQUIRES 3.3 SUPPLY
|
ALSO REQUIRES 3.3 SUPPLY
|
| Clock Frequency-Max |
402.5 MHz
|
402.5 MHz
|
| JESD-30 Code |
S-PBGA-B672
|
S-PBGA-B672
|
| JESD-609 Code |
e1
|
e0
|
| Length |
27 mm
|
27 mm
|
| Moisture Sensitivity Level |
3
|
3
|
| Number of CLBs |
3158
|
3158
|
| Number of Inputs |
450
|
450
|
| Number of Logic Cells |
50528
|
50528
|
| Number of Outputs |
434
|
434
|
| Number of Terminals |
672
|
672
|
| Organization |
3158 CLBS
|
3158 CLBS
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
BGA
|
BGA
|
| Package Equivalence Code |
BGA672,26X26,40
|
BGA672,26X26,40
|
| Package Shape |
SQUARE
|
SQUARE
|
| Package Style |
GRID ARRAY
|
GRID ARRAY
|
| Peak Reflow Temperature (Cel) |
260
|
|
| Programmable Logic Type |
FIELD PROGRAMMABLE GATE ARRAY
|
FIELD PROGRAMMABLE GATE ARRAY
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
2.6 mm
|
2.6 mm
|
| Supply Voltage-Max |
1.25 V
|
1.25 V
|
| Supply Voltage-Min |
1.15 V
|
1.15 V
|
| Supply Voltage-Nom |
1.2 V
|
1.2 V
|
| Surface Mount |
YES
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Terminal Finish |
TIN SILVER COPPER
|
TIN LEAD
|
| Terminal Form |
BALL
|
BALL
|
| Terminal Pitch |
1 mm
|
1 mm
|
| Terminal Position |
BOTTOM
|
BOTTOM
|
| Time@Peak Reflow Temperature-Max (s) |
30
|
|
| Width |
27 mm
|
27 mm
|
| Base Number Matches |
1
|
2
|
| Operating Temperature-Max |
|
85 °C
|
| Operating Temperature-Min |
|
|
| Temperature Grade |
|
OTHER
|
|
|
|
Compare EP2C50F672I8N with alternatives
Compare EP2C50F672C8 with alternatives