EP910APC-25 vs 5962-8854801QA feature comparison

EP910APC-25 Altera Corporation

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5962-8854801QA Intel Corporation

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Pbfree Code No
Rohs Code No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer ALTERA CORP INTEL CORP
Part Package Code DIP DIP
Package Description DIP, DIP40,.6 DIP,
Pin Count 40 40
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature MACROCELLS INTERCONNECTED BY GLOBAL BUS; 24 MACROCELLS; 2 EXTERNAL CLOCKS
Architecture PAL-TYPE
Clock Frequency-Max 40 MHz 14.3 MHz
JESD-30 Code R-PDIP-T40 R-XDIP-T40
JESD-609 Code e0
Length 52.4256 mm
Number of Dedicated Inputs 12 12
Number of I/O Lines 24 24
Number of Inputs 36
Number of Outputs 24
Number of Product Terms 240
Number of Terminals 40 40
Operating Temperature-Max 70 °C 125 °C
Operating Temperature-Min -55 °C
Organization 12 DEDICATED INPUTS, 24 I/O 12 DEDICATED INPUTS, 24 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY UNSPECIFIED
Package Code DIP DIP
Package Equivalence Code DIP40,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Peak Reflow Temperature (Cel) 220
Programmable Logic Type OT PLD UV PLD
Propagation Delay 25 ns 60 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.445 mm
Supply Voltage-Max 5.25 V 5.5 V
Supply Voltage-Min 4.75 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL MILITARY
Terminal Finish TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL DUAL
Width 15.24 mm
Base Number Matches 1 2
ECCN Code 3A001.A.2.C
Screening Level MIL-STD-883

Compare EP910APC-25 with alternatives

Compare 5962-8854801QA with alternatives