EP910APC-25 vs D5C090-60 feature comparison

EP910APC-25 Altera Corporation

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D5C090-60 Intel Corporation

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Pbfree Code No
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer ALTERA CORP INTEL CORP
Part Package Code DIP DIP
Package Description DIP, DIP40,.6 WDIP, DIP40,.6
Pin Count 40 40
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature MACROCELLS INTERCONNECTED BY GLOBAL BUS; 24 MACROCELLS; 2 EXTERNAL CLOCKS PAL WITH MACROCELLS; 24 MACROCELLS; 2 EXTERNAL CLOCKS; ASYNCHRONOUS CLOCKS
Architecture PAL-TYPE PAL-TYPE
Clock Frequency-Max 40 MHz 13.5 MHz
JESD-30 Code R-PDIP-T40 R-GDIP-T40
JESD-609 Code e0 e0
Length 52.4256 mm 52.325 mm
Number of Dedicated Inputs 12 12
Number of I/O Lines 24 24
Number of Inputs 36 36
Number of Outputs 24 24
Number of Product Terms 240 240
Number of Terminals 40 40
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 12 DEDICATED INPUTS, 24 I/O 12 DEDICATED INPUTS, 24 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY CERAMIC, GLASS-SEALED
Package Code DIP WDIP
Package Equivalence Code DIP40,.6 DIP40,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE, WINDOW
Peak Reflow Temperature (Cel) 220
Programmable Logic Type OT PLD UV PLD
Propagation Delay 25 ns 60 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.445 mm 5.72 mm
Supply Voltage-Max 5.25 V 5.25 V
Supply Voltage-Min 4.75 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Finish TIN LEAD TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 15.24 mm 15.24 mm
Base Number Matches 1 1

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