EP910DC-35 vs EP910PC-35 feature comparison

EP910DC-35 Altera Corporation

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EP910PC-35 Texas Instruments

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Pbfree Code No
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer ALTERA CORP TEXAS INSTRUMENTS INC
Part Package Code DIP
Package Description WINDOWED, CERDIP-40 DIP-40
Pin Count 40
Reach Compliance Code unknown not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature MACROCELLS INTERCONNECTED BY GLOBAL BUS; 24 MACROCELLS; 2 EXTERNAL CLOCKS
Architecture PAL-TYPE PAL-TYPE
Clock Frequency-Max 28.6 MHz 37 MHz
JESD-30 Code R-GDIP-T40 R-PDIP-T40
JESD-609 Code e0
Number of Dedicated Inputs 12 12
Number of I/O Lines 24 24
Number of Inputs 36 36
Number of Outputs 24 24
Number of Product Terms 240 240
Number of Terminals 40 40
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 12 DEDICATED INPUTS, 24 I/O 12 DEDICATED INPUTS, 24 I/O
Output Function MACROCELL MACROCELL
Package Body Material CERAMIC, GLASS-SEALED PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP40,.6 DIP40,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Peak Reflow Temperature (Cel) 220 NOT SPECIFIED
Programmable Logic Type UV PLD OT PLD
Propagation Delay 38 ns 35 ns
Qualification Status Not Qualified Not Qualified
Supply Voltage-Max 5.25 V 5.25 V
Supply Voltage-Min 4.75 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Finish TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Base Number Matches 3 3
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED

Compare EP910DC-35 with alternatives

Compare EP910PC-35 with alternatives