EPM7256EGC192-12 vs EPM7256EGC192-12 feature comparison

EPM7256EGC192-12 Altera Corporation

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EPM7256EGC192-12 Intel Corporation

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Pbfree Code No
Rohs Code No No
Part Life Cycle Code Transferred Obsolete
Ihs Manufacturer ALTERA CORP INTEL CORP
Part Package Code PGA
Package Description PGA, PGA192M,17X17 PGA, PGA192M,17X17
Pin Count 192
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Clock Frequency-Max 125 MHz 125 MHz
In-System Programmable NO NO
JESD-30 Code S-CPGA-P192 S-CPGA-P192
JESD-609 Code e0 e0
JTAG BST NO NO
Length 45.15 mm 45.15 mm
Moisture Sensitivity Level 1 1
Number of Dedicated Inputs
Number of I/O Lines 164 164
Number of Macro Cells 256 256
Number of Terminals 192 192
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 0 DEDICATED INPUTS, 164 I/O 0 DEDICATED INPUTS, 164 I/O
Output Function MACROCELL MACROCELL
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
Package Code PGA PGA
Package Equivalence Code PGA192M,17X17 PGA192M,17X17
Package Shape SQUARE SQUARE
Package Style GRID ARRAY GRID ARRAY
Peak Reflow Temperature (Cel) 220
Programmable Logic Type EE PLD EE PLD
Propagation Delay 12 ns 12 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.43 mm 5.43 mm
Supply Voltage-Max 5.25 V 5.25 V
Supply Voltage-Min 4.75 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Finish TIN LEAD TIN LEAD
Terminal Form PIN/PEG PIN/PEG
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position PERPENDICULAR PERPENDICULAR
Width 45.15 mm 45.15 mm
Base Number Matches 3 1

Compare EPM7256EGC192-12 with alternatives

Compare EPM7256EGC192-12 with alternatives