GAL16V8A-10LNC vs GAL16V8A-10LP feature comparison

GAL16V8A-10LNC Texas Instruments

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GAL16V8A-10LP Lattice Semiconductor Corporation

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer NATIONAL SEMICONDUCTOR CORP LATTICE SEMICONDUCTOR CORP
Package Description DIP, DIP20,.3 PLASTIC, DIP-20
Reach Compliance Code unknown not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Architecture PAL-TYPE PAL-TYPE
Clock Frequency-Max 55.5 MHz 58.8 MHz
JESD-30 Code R-PDIP-T20 R-PDIP-T20
JESD-609 Code e0 e0
Length 26.075 mm 26.125 mm
Number of Dedicated Inputs 8 8
Number of I/O Lines 8 8
Number of Inputs 18 18
Number of Outputs 8 8
Number of Product Terms 64 64
Number of Terminals 20 20
Operating Temperature-Max 75 °C 75 °C
Operating Temperature-Min
Organization 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP20,.3 DIP20,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Programmable Logic Type EE PLD EE PLD
Propagation Delay 10 ns 10 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.08 mm 4.57 mm
Supply Voltage-Max 5.25 V 5.25 V
Supply Voltage-Min 4.75 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL EXTENDED COMMERCIAL EXTENDED
Terminal Finish TIN LEAD Tin/Lead (Sn/Pb)
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 2 1
Part Package Code DIP
Pin Count 20
Additional Feature 8 MACROCELLS; 1 EXTERNAL CLOCK; REGISTER PRELOAD; SHARED INPUT/CLOCK

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Compare GAL16V8A-10LP with alternatives