HCF4099BEY
vs
CD4099BDMSR
feature comparison
All Stats
Differences Only
Pbfree Code
Rohs Code
Part Life Cycle Code
Obsolete
End Of Life
Ihs Manufacturer
STMICROELECTRONICS
RENESAS ELECTRONICS CORP
Part Package Code
DIP
SBDIP
Package Description
PLASTIC, DIP-16
DIP,
Pin Count
16
16
Reach Compliance Code
unknown
compliant
HTS Code
8542.39.00.01
8542.39.00.01
Samacsys Manufacturer
STMicroelectronics
Renesas Electronics
Additional Feature
1:8 DMUX FOLLOWED BY LATCH
1:8 DMUX FOLLOWED BY LATCH
Family
4000/14000/40000
4000/14000/40000
JESD-30 Code
R-PDIP-T16
R-CDIP-T16
JESD-609 Code
e4
e3
Load Capacitance (CL)
50 pF
Logic IC Type
D LATCH
D LATCH
Number of Bits
1
1
Number of Functions
1
1
Number of Terminals
16
16
Operating Temperature-Max
125 °C
125 °C
Operating Temperature-Min
-55 °C
-55 °C
Output Polarity
TRUE
TRUE
Package Body Material
PLASTIC/EPOXY
CERAMIC, METAL-SEALED COFIRED
Package Code
DIP
DIP
Package Equivalence Code
DIP16,.3
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Packing Method
TUBE
Prop. Delay@Nom-Sup
400 ns
Propagation Delay (tpd)
400 ns
540 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
5.1 mm
5.08 mm
Supply Voltage-Max (Vsup)
20 V
18 V
Supply Voltage-Min (Vsup)
3 V
3 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
MILITARY
MILITARY
Terminal Finish
NICKEL PALLADIUM GOLD
Matte Tin (Sn)
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
DUAL
DUAL
Trigger Type
LOW LEVEL
LOW LEVEL
Width
7.62 mm
7.62 mm
Base Number Matches
1
1
Manufacturer Package Code
D16.3
Samacsys Description
The CD4099BMS 8-bit addressable latch is a serial input, parallel output storage register that can perform a variety of functions. Data are inputted to a particular bit in the latch when that bit is addressed (by means of inputs A0, A1, A2) and when WRITE DISABLE is at a low level. When WRITE DISABLE is high, data entry is inhibited; however, all 8 outputs can be continuously read independent of WRITE DISABLE and address inputs. A master RESET input is available, which resets all bits to a logic 0 level whe
Samacsys Modified On
2023-10-24 19:30:29
Screening Level
MIL-PRF-38535 Class V
Total Dose
100k Rad(Si) V
Compare HCF4099BEY with alternatives
Compare CD4099BDMSR with alternatives