HD74HC132P vs TC74HC00AF-TP2EL feature comparison

HD74HC132P Renesas Electronics Corporation

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TC74HC00AF-TP2EL Toshiba America Electronic Components

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Source Content uid HD74HC132P TC74HC00AF-TP2EL
Pbfree Code Yes No
Rohs Code Yes No
Part Life Cycle Code Obsolete Active
Part Package Code DIP SOIC
Package Description DIP, DIP14,.3 SOP,
Pin Count 14 14
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Family HC/UH HC/UH
JESD-30 Code R-PDIP-T14 R-PDSO-G14
Length 19.2 mm 10.3 mm
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type NAND GATE NAND GATE
Max I(ol) 0.004 A
Moisture Sensitivity Level 1
Number of Functions 4 4
Number of Inputs 2 2
Number of Terminals 14 14
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP SOP
Package Equivalence Code DIP14,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE SMALL OUTLINE
Packing Method TR
Peak Reflow Temperature (Cel) NOT SPECIFIED 240
Power Supplies 2/6 V
Prop. Delay@Nom-Sup 25 ns
Propagation Delay (tpd) 125 ns 19 ns
Qualification Status Not Qualified Not Qualified
Schmitt Trigger YES
Seated Height-Max 5.06 mm 1.9 mm
Supply Voltage-Max (Vsup) 6 V 6 V
Supply Voltage-Min (Vsup) 2 V 2 V
Supply Voltage-Nom (Vsup) 4.5 V 5 V
Surface Mount NO YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form THROUGH-HOLE GULL WING
Terminal Pitch 2.54 mm 1.27 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED NOT SPECIFIED
Width 7.62 mm 5.3 mm
Base Number Matches 2 1
JESD-609 Code e0
Terminal Finish Tin/Lead (Sn/Pb)

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