PBLS4001V,115
vs
PBLS4001V
feature comparison
| Rohs Code |
Yes
|
Yes
|
| Part Life Cycle Code |
Transferred
|
Transferred
|
| Ihs Manufacturer |
NXP SEMICONDUCTORS
|
NXP SEMICONDUCTORS
|
| Part Package Code |
SOT
|
|
| Package Description |
PLASTIC PACKAGE-6
|
PLASTIC PACKAGE-6
|
| Pin Count |
6
|
6
|
| Manufacturer Package Code |
SOT666
|
|
| Reach Compliance Code |
compliant
|
compliant
|
| ECCN Code |
EAR99
|
EAR99
|
| Factory Lead Time |
4 Weeks
|
|
| Additional Feature |
BUILT IN BIAS RESISTOR RATIO 1
|
BUILT IN BIAS RESISTOR RATIO 1
|
| Collector Current-Max (IC) |
0.5 A
|
0.5 A
|
| Collector-Emitter Voltage-Max |
40 V
|
40 V
|
| Configuration |
SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
|
SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
|
| DC Current Gain-Min (hFE) |
200
|
200
|
| JESD-30 Code |
R-PDSO-F6
|
R-PDSO-F6
|
| JESD-609 Code |
e3
|
e3
|
| Moisture Sensitivity Level |
1
|
1
|
| Number of Elements |
2
|
2
|
| Number of Terminals |
6
|
6
|
| Operating Temperature-Max |
150 °C
|
150 °C
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
SMALL OUTLINE
|
SMALL OUTLINE
|
| Peak Reflow Temperature (Cel) |
260
|
260
|
| Polarity/Channel Type |
PNP
|
PNP
|
| Power Dissipation-Max (Abs) |
0.3 W
|
0.3 W
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Surface Mount |
YES
|
YES
|
| Terminal Finish |
TIN
|
Tin (Sn)
|
| Terminal Form |
FLAT
|
FLAT
|
| Terminal Position |
DUAL
|
DUAL
|
| Time@Peak Reflow Temperature-Max (s) |
30
|
30
|
| Transistor Application |
SWITCHING
|
SWITCHING
|
| Transistor Element Material |
SILICON
|
SILICON
|
| Transition Frequency-Nom (fT) |
300 MHz
|
300 MHz
|
| Base Number Matches |
1
|
2
|
|
|
|
Compare PBLS4001V,115 with alternatives
Compare PBLS4001V with alternatives