PLDC18G8-15DMB vs EP320DI-2 feature comparison

PLDC18G8-15DMB Cypress Semiconductor

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EP320DI-2 Altera Corporation

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer CYPRESS SEMICONDUCTOR CORP ALTERA CORP
Part Package Code DIP DIP
Package Description 0.300 INCH, CERDIP-20 WDIP, DIP20,.3
Pin Count 20 20
Reach Compliance Code compliant unknown
ECCN Code 3A001.A.2.C
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature PAL WITH MACROCELLS; 8 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK 8 MACROCELLS; SHARED INPUT/CLOCK
Architecture PAL-TYPE PAL-TYPE
Clock Frequency-Max 41.6 MHz 40 MHz
JESD-30 Code R-GDIP-T20 R-GDIP-T20
JESD-609 Code e0 e0
Length 24.13 mm 24.003 mm
Number of Dedicated Inputs 8 9
Number of I/O Lines 8 8
Number of Inputs 18 18
Number of Outputs 8 8
Number of Product Terms 72 72
Number of Terminals 20 20
Operating Temperature-Max 125 °C 85 °C
Operating Temperature-Min -55 °C -40 °C
Organization 8 DEDICATED INPUTS, 8 I/O 9 DEDICATED INPUTS, 8 I/O
Output Function MACROCELL MACROCELL
Package Body Material CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
Package Code DIP WDIP
Package Equivalence Code DIP20,.3 DIP20,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE, WINDOW
Programmable Logic Type OT PLD UV PLD
Propagation Delay 15 ns 35 ns
Qualification Status Not Qualified Not Qualified
Screening Level 38535Q/M;38534H;883B
Seated Height-Max 5.08 mm 4.826 mm
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 4.5 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade MILITARY INDUSTRIAL
Terminal Finish Tin/Lead (Sn/Pb) TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 1
Pbfree Code No
Peak Reflow Temperature (Cel) 220

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