PLSI1024-80LJ
vs
MACH221-12JC
feature comparison
| Rohs Code |
No
|
No
|
| Part Life Cycle Code |
Obsolete
|
Transferred
|
| Ihs Manufacturer |
LATTICE SEMICONDUCTOR CORP
|
VANTIS CORP
|
| Part Package Code |
LCC
|
|
| Package Description |
PLASTIC, LCC-68
|
|
| Pin Count |
68
|
|
| Reach Compliance Code |
not_compliant
|
unknown
|
| HTS Code |
8542.39.00.01
|
|
| Additional Feature |
4 EXTERNAL CLOCKS
|
PAL BLOCKS INTERCONNECTED BY PIA
|
| Clock Frequency-Max |
50 MHz
|
62.5 MHz
|
| In-System Programmable |
NO
|
NO
|
| JESD-30 Code |
S-PQCC-J68
|
S-PQCC-J68
|
| JESD-609 Code |
e0
|
e0
|
| JTAG BST |
NO
|
NO
|
| Length |
24.2316 mm
|
|
| Moisture Sensitivity Level |
3
|
|
| Number of Dedicated Inputs |
6
|
4
|
| Number of I/O Lines |
48
|
48
|
| Number of Macro Cells |
96
|
96
|
| Number of Terminals |
68
|
68
|
| Operating Temperature-Max |
70 °C
|
70 °C
|
| Operating Temperature-Min |
|
|
| Organization |
6 DEDICATED INPUTS, 48 I/O
|
4 DEDICATED INPUTS, 48 I/O
|
| Output Function |
MACROCELL
|
MACROCELL
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
QCCJ
|
QCCJ
|
| Package Equivalence Code |
LDCC68,1.0SQ
|
LDCC68,1.0SQ
|
| Package Shape |
SQUARE
|
SQUARE
|
| Package Style |
CHIP CARRIER
|
CHIP CARRIER
|
| Peak Reflow Temperature (Cel) |
225
|
|
| Programmable Logic Type |
EE PLD
|
EE PLD
|
| Propagation Delay |
20 ns
|
16 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
4.57 mm
|
|
| Supply Voltage-Max |
5.25 V
|
5.25 V
|
| Supply Voltage-Min |
4.75 V
|
4.75 V
|
| Supply Voltage-Nom |
5 V
|
5 V
|
| Surface Mount |
YES
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
COMMERCIAL
|
COMMERCIAL
|
| Terminal Finish |
TIN LEAD
|
Tin/Lead (Sn/Pb)
|
| Terminal Form |
J BEND
|
J BEND
|
| Terminal Pitch |
1.27 mm
|
1.27 mm
|
| Terminal Position |
QUAD
|
QUAD
|
| Time@Peak Reflow Temperature-Max (s) |
30
|
|
| Width |
24.2316 mm
|
|
| Base Number Matches |
1
|
3
|
|
|
|
Compare PLSI1024-80LJ with alternatives