TC74LVQ138FNELP vs 74LVQ138SCX feature comparison

TC74LVQ138FNELP Toshiba America Electronic Components

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74LVQ138SCX Fairchild Semiconductor Corporation

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Pbfree Code No
Rohs Code No Yes
Part Life Cycle Code Active Obsolete
Ihs Manufacturer TOSHIBA CORP FAIRCHILD SEMICONDUCTOR CORP
Part Package Code SOIC SOIC
Package Description SOP, 0.150 INCH, MS-012, SOIC-16
Pin Count 16 16
Reach Compliance Code unknown unknown
Additional Feature 3 ENABLE INPUTS
Family LVQ LVQ
JESD-30 Code R-PDSO-G16 R-PDSO-G16
Length 9.9 mm 9.9 mm
Load Capacitance (CL) 50 pF 50 pF
Number of Functions 1 1
Number of Terminals 16 16
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Polarity INVERTED INVERTED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SOP SOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Cel) 240
Propagation Delay (tpd) 15 ns 21 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.75 mm 1.75 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 2 V 2 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 3.9 mm 3.9 mm
Base Number Matches 1 3
ECCN Code EAR99
HTS Code 8542.39.00.01
Input Conditioning STANDARD
JESD-609 Code e3
Logic IC Type 3-LINE TO 8-LINE DECODER
Max I(ol) 0.012 A
Moisture Sensitivity Level 1
Package Equivalence Code SOP16,.25
Packing Method TR
Prop. Delay@Nom-Sup 15 ns
Terminal Finish MATTE TIN

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Compare 74LVQ138SCX with alternatives