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3.3V CMOS Dual 1 to 5 Clock Divider, QSOP0/Reel
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
49FCT3805EQGI8-ND
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DigiKey | IC CLK BUFFER 1:5 166MHZ 20SSOP Min Qty: 3000 Lead time: 12 Weeks Container: Tape & Reel (TR) | Temporarily Out of Stock |
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$2.5254 | Buy Now |
DISTI #
972-49FCT3805EQGI8
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Mouser Electronics | Clock Drivers & Distribution 3.3V Dual 1:5 Clock Driver RoHS: Compliant | 0 |
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$2.5200 | Order Now |
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Future Electronics | RoHS: Compliant pbFree: Yes Min Qty: 3000 Package Multiple: 3000 Lead time: 18 Weeks Container: Reel | 0Reel |
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$2.3000 | Buy Now |
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Future Electronics | RoHS: Compliant pbFree: Yes Min Qty: 3000 Package Multiple: 3000 Lead time: 18 Weeks Container: Reel | 0Reel |
|
$2.3000 | Buy Now |
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49FCT3805EQGI8
Renesas Electronics Corporation
Buy Now
Datasheet
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49FCT3805EQGI8
Renesas Electronics Corporation
3.3V CMOS Dual 1 to 5 Clock Divider, QSOP0/Reel
|
Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Not Recommended | |
Ihs Manufacturer | RENESAS ELECTRONICS CORP | |
Part Package Code | QSOP | |
Pin Count | 20 | |
Manufacturer Package Code | PCG20 | |
Reach Compliance Code | compliant | |
ECCN Code | NLR | |
HTS Code | 8542390001 | |
Factory Lead Time | 26 Weeks, 1 Day | |
Samacsys Manufacturer | Renesas Electronics | |
Family | FCT | |
Input Conditioning | STANDARD | |
JESD-30 Code | R-PDSO-G20 | |
JESD-609 Code | e3 | |
Logic IC Type | LOW SKEW CLOCK DRIVER | |
Max I(ol) | 0.012 A | |
Moisture Sensitivity Level | 1 | |
Number of Functions | 2 | |
Number of Inverted Outputs | ||
Number of Terminals | 20 | |
Number of True Outputs | 5 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Output Characteristics | 3-STATE | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | SSOP | |
Package Equivalence Code | SSOP20,.25 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE, SHRINK PITCH | |
Packing Method | TR | |
Peak Reflow Temperature (Cel) | 260 | |
Prop. Delay@Nom-Sup | 2.5 ns | |
Propagation Delay (tpd) | 2.5 ns | |
Qualification Status | Not Qualified | |
Same Edge Skew-Max (tskwd) | 0.2 ns | |
Supply Voltage-Max (Vsup) | 3.6 V | |
Supply Voltage-Min (Vsup) | 3 V | |
Supply Voltage-Nom (Vsup) | 3.3 V | |
Surface Mount | YES | |
Technology | CMOS | |
Terminal Finish | MATTE TIN | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.635 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 |