Part Details for 74HCT00PW-Q100,118 by NXP Semiconductors
Overview of 74HCT00PW-Q100,118 by NXP Semiconductors
- Distributor Offerings: (0 listings)
- Number of FFF Equivalents: (0 replacements)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (0 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
Available Datasheets
Part # | Manufacturer | Description | Datasheet |
---|---|---|---|
10156545-123Q100LF | Amphenol Communications Solutions | PCI Express®x16 vertical Card Edge Connector, 164 Positions, 1mm (0.039inch) Pitch | |
SN74HCT00PWRG4 | Texas Instruments | Quadruple 2-Input Positive-NAND Gates 14-TSSOP -40 to 85 | |
SN74HCT00PWR | Texas Instruments | Quadruple 2-Input Positive-NAND Gates 14-TSSOP -40 to 85 |
Part Details for 74HCT00PW-Q100,118
74HCT00PW-Q100,118 CAD Models
74HCT00PW-Q100,118 Part Data Attributes
|
74HCT00PW-Q100,118
NXP Semiconductors
Buy Now
Datasheet
|
Compare Parts:
74HCT00PW-Q100,118
NXP Semiconductors
74HC(T)00-Q100 - Quad 2-input NAND gate TSSOP 14-Pin
|
Rohs Code | Yes | |
Part Life Cycle Code | Transferred | |
Ihs Manufacturer | NXP SEMICONDUCTORS | |
Part Package Code | TSSOP | |
Package Description | 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14 | |
Pin Count | 14 | |
Manufacturer Package Code | SOT402-1 | |
Reach Compliance Code | compliant | |
Factory Lead Time | 4 Weeks | |
Family | HCT | |
JESD-30 Code | R-PDSO-G14 | |
Length | 5 mm | |
Load Capacitance (CL) | 50 pF | |
Logic IC Type | NAND GATE | |
Moisture Sensitivity Level | 1 | |
Number of Functions | 4 | |
Number of Inputs | 2 | |
Number of Terminals | 14 | |
Operating Temperature-Max | 125 °C | |
Operating Temperature-Min | -40 °C | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TSSOP | |
Package Equivalence Code | TSSOP14,.25 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
Packing Method | TR | |
Peak Reflow Temperature (Cel) | 260 | |
Prop. Delay@Nom-Sup | 29 ns | |
Propagation Delay (tpd) | 29 ns | |
Qualification Status | Not Qualified | |
Schmitt Trigger | NO | |
Screening Level | AEC-Q100 | |
Seated Height-Max | 1.1 mm | |
Supply Voltage-Max (Vsup) | 5.5 V | |
Supply Voltage-Min (Vsup) | 4.5 V | |
Supply Voltage-Nom (Vsup) | 5 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | AUTOMOTIVE | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.65 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 4.4 mm |