Part Details for 74AUP1G57GS,132 by NXP Semiconductors
Overview of 74AUP1G57GS,132 by NXP Semiconductors
- Distributor Offerings: (3 listings)
- Number of FFF Equivalents: (0 crosses)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (0 crosses)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
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Applications
Energy and Power Systems
Transportation and Logistics
Automotive
Price & Stock for 74AUP1G57GS,132
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
2156-74AUP1G57GS,132-ND
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DigiKey | NOW NEXPERIA 74AUP1G57GS - LOGIC Min Qty: 3191 Container: Bulk MARKETPLACE PRODUCT |
138720 In Stock |
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$0.0900 | Buy Now |
DISTI #
2156-74AUP1G57GS,132-954-ND
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DigiKey | NEXPERIA 74AUP1G57GS - LOGIC CIR Min Qty: 3191 Lead time: 1 Weeks Container: Bulk MARKETPLACE PRODUCT |
90000 In Stock |
|
$0.0900 | Buy Now |
|
Rochester Electronics | 74AUP1G57GS - Logic Circuit RoHS: Compliant Status: Active Min Qty: 1 | 90000 |
|
$0.0807 / $0.0949 | Buy Now |
Part Details for 74AUP1G57GS,132
74AUP1G57GS,132 CAD Models
74AUP1G57GS,132 Part Data Attributes
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74AUP1G57GS,132
NXP Semiconductors
Buy Now
Datasheet
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74AUP1G57GS,132
NXP Semiconductors
74AUP1G57 - Low-power configurable multiple function gate
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Rohs Code | Yes | |
Part Life Cycle Code | Transferred | |
Ihs Manufacturer | NXP SEMICONDUCTORS | |
Package Description | 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6 | |
Manufacturer Package Code | SOT1202 | |
Reach Compliance Code | compliant | |
Factory Lead Time | 4 Weeks | |
Family | AUP/ULP/V | |
JESD-30 Code | S-PDSO-N6 | |
JESD-609 Code | e3 | |
Length | 1 mm | |
Load Capacitance (CL) | 30 pF | |
Logic IC Type | LOGIC CIRCUIT | |
Max I(ol) | 0.0017 A | |
Moisture Sensitivity Level | 1 | |
Number of Functions | 1 | |
Number of Terminals | 6 | |
Operating Temperature-Max | 125 °C | |
Operating Temperature-Min | -40 °C | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | VSON | |
Package Equivalence Code | SOLCC6,.04,14 | |
Package Shape | SQUARE | |
Package Style | SMALL OUTLINE, VERY THIN PROFILE | |
Packing Method | TR | |
Peak Reflow Temperature (Cel) | 260 | |
Prop. Delay@Nom-Sup | 22.3 ns | |
Qualification Status | Not Qualified | |
Schmitt Trigger | YES | |
Seated Height-Max | 0.35 mm | |
Supply Voltage-Max (Vsup) | 3.6 V | |
Supply Voltage-Min (Vsup) | 0.8 V | |
Supply Voltage-Nom (Vsup) | 1.1 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | AUTOMOTIVE | |
Terminal Finish | TIN | |
Terminal Form | NO LEAD | |
Terminal Pitch | 0.35 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 1 mm |