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BLM41PG102SN1L

Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN

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Price Range $0.3650

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Part Number Description Manufacturer Compare
BLM41PG102SH1 Filters Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN Murata Manufacturing Co Ltd BLM41PG102SN1L vs BLM41PG102SH1
BLM41PG102SN1D Filters Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN Murata Manufacturing Co Ltd BLM41PG102SN1L vs BLM41PG102SN1D
BLM41PG102SN1J Filters Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN Murata Manufacturing Co Ltd BLM41PG102SN1L vs BLM41PG102SN1J
BLM41PG102SN1C Filters Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN Murata Manufacturing Co Ltd BLM41PG102SN1L vs BLM41PG102SN1C
Part Number Description Manufacturer Compare
BLM41PG102SN1J Filters Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN Murata Manufacturing Co Ltd BLM41PG102SN1L vs BLM41PG102SN1J
BLM41PG102SN1C Filters Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN Murata Manufacturing Co Ltd BLM41PG102SN1L vs BLM41PG102SN1C
BLM41PG102SH1 Filters Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN Murata Manufacturing Co Ltd BLM41PG102SN1L vs BLM41PG102SH1
BLM41PG102SN1D Filters Ferrite Chip, 1 Function(s), 1.5A, EIA STD PACKAGE SIZE 1806, 2 PIN Murata Manufacturing Co Ltd BLM41PG102SN1L vs BLM41PG102SN1D

Global Popularity

Popularity in Filters

Popularity in Data Line Filters

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Very High

Medium

Good

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  • 1. United States
    100
  • 2. Portugal
    95
  • 3. India
    93
  • 4. Tunisia
    92
  • 5. Argentina
    91
  • 6. Chile
    89
  • 7. Taiwan
    86
  • 8. Estonia
    86
  • 9. Japan
    84
  • 10. Singapore
    83

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  • 1. Future Electronics $0.3650 Buy Now

Datasheets & Reference Designs

Reference Designs

  • Adjacent Channel Power Ratio (ACPR) and Error Vector Magnitude (%EVM) Measurements
    TIDA-00076: This reference design discusses the use of the TSW3085EVM with the TSW3100 pattern generator to test adjacent channel power ratio (ACPR) and error vector magnitude (EVM) measurements of LTE baseband signals. By using the TSW3100 LTE GUI, patterns are loaded into the TSW3085EVM which is comprised of the DAC3482, TRF3705, and LMK04806.
  • Altera Arria V FPGA Power Supply Reference Design - PMP9357.1 - TI Tool Folder
    PMP9357: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
  • Altera Arria V GZ FPGA Discrete Power Solution Reference Design
    PMP9357: The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing, a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
  • Altera Arria V FPGA Power Supply Reference Design
    PMP9357.1: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
  • Basestation Transceiver with DPD Feedback Path
    TIDA-00068: The design is for a small cell base station development platform. It provides two real receive paths, two complex transmit paths, and a shared real feedback path. This design has macro basestation performance, but with small cell base station footprint. The current design handles up to 20MHz of bandwidth.
  • Altera Arria V FPGA Power Supply Reference Design
    PMP9357.2: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
  • Altera Arria V FPGA Power Supply Reference Design - PMP9357.2 - TI Tool Folder
    PMP9357: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
  • Optimizing LMH6554 to Drive High Speed ADCs
    TIDA-00092: This reference design shows the ability of the high-speed amplifier, LMH6554, to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both AC and DC coupled applications while interfaced to the ADS4449 quad, 250-MSPS, 14-bit ADC. Various options for common-mode voltages, power supplies, and interfaces are discussed and measured to meet the requirements of a variety of applications. Anti-aliasing filter examples are shown along with the performance improvements that they provide.
  • Altera Arria V FPGA Power Supply Reference Design
    PMP9357.5: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
  • Altera Arria V FPGA Power Supply Reference Design
    PMP9357.6: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
  • Synchronizing Multiple JESD204B ADCs for Emitter Position Location Reference Design
    TIDA-00467: A common technique to estimate the position of emitters uses the amplitude and phase shift data of a signal derived from an array of spatially distributed sensors. For such systems, it is important to guarantee a deterministic phase relationship between the sensors to minimize errors in the actual measured data. This application design will discuss how multiple Analog to Digital Converters (ADCs) with a JESD204B interface can be synchronized so that the sampled data from the ADCs are phase aligned.
  • Altera Arria V FPGA Power Supply Reference Design
    PMP9357.4: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
  • Altera Arria V FPGA Power Supply Reference Design
    PMP9357.3: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
  • High Perf Single Ended to Diff Active Interface for High Speed ADC Developed by Dallas Logic Corp : Dallas Logic Corporation
    TIDA-00294: This reference design uses the ADC34J22 12b 50Msps JESD204B data converter and the THS4541 fully differential amplifer to demonstrate how to design a high performance active interface for high speed ADCs. This type of circuit can be used in sensor front end, motor control, and test and measurement applications. The circuit model and derivation of the design equations is presented along with the actual implementation on a PCB. Results of this implementation are presented to show very similar performance as compared to a passive AC coupled transformer interface.

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