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Price & Stock for: GRM32ER61C476KE15L

Distributor Stock MOQ Package QTY Break / Prices
View this part on Avnet Americas 42,000 1,000 Reel
  • 1,000 $0.1428
  • 2,000 $0.4547
  • 4,000 $0.4524
  • 6,000 $0.3403
  • 8,000 $0.3018
  • 10,000 $0.2969
  • 100,000 $0.2921
View this part on Newark 0 1 TAPE & REEL CUT
  • 1 $0.9110
  • 10 $0.8170
  • 25 $0.7440
  • 50 $0.6590
  • 100 $0.5860
  • 250 $0.5020
  • 500 $0.4410
  • 1,000 $0.3500
View this part on Bristol Electronics 860 6
  • 6 $0.9375
  • 23 $0.6094
  • 84 $0.3516
  • 286 $0.3000
  • 618 $0.2625
View this part on Bristol Electronics 11,250 1
View this part on Bristol Electronics 2,000 1

Purchasing Insights: GRM32ER61C476KE15L

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Risk Rank

Risk Rank is a proprietary algorithm Supplyframe has developed to quantify component risk rank using multiple data points. This ranking helps engineers and buyers determine whether alternates should be sought for parts that are deemed as high risk.

Risk Rank Example

Risk Rank is determined by a combination of factors such as product lifecycle status, price & inventory votality, current inventory availability, and much more. Even the availability of manufacturer specifications and part documentation, such as datasheets and reference designs, have an impact on determining the overall riskiness of a part.

The risk is characterized across three product phases:

  • Design
  • Production
  • Long Term

For Purchasing Risk Rank, we focus on the Production and the Long Term Phases on Findchips in our evaluation of Risk.

Production Phase

The production phase is when the product is being assembled. Sourcing parts reliably is the essential task during this phase, as it determines whether the product can continue production. During the production phase, there is no time to test new components if something goes awry – the design is the locked-in and a primary risk factor is the component availability in the marketplace. It is possible to utilize alternative parts if things go wrong during this phase, but they need to be FFF (form, fit, function) compatible. Therefore, if a part is available in the online marketplace and has available FFF components, it will be listed as lower risk.

Long Term Phase

The amount of time that a product is manufactured often depends on the industry. Some automobile electronics are made consistently for 5-10 years, whereas military and industrial electronics could be produced from anywhere from 30-50 years.

This means part risk goes up with the likelihood of obsolescence. If a chip manufacturer decides to stop making a particular chip, it is supremely disruptive to mature products, because there may not even be replacement parts available. Other factors like environmental certifications (RoHS) feed into this as well, as non-certified parts are more likely to become obsolete in the future.

We combine both of these aspects into a Purchasing Risk Rank score in order to focus in on risk elements that would be most pertinent for purchasers to be aware of.

Risk Rank Breakdown

Risk Rank: Purchasing Risk

What is purchasing risk rank?

Purchasing Risk Rank is determined by in-depth analysis across risk factors of production risk and long term risk of a given part.

Market Price Analysis

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Distributors with Stock

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1,738,245

Part Details for: GRM32ER61C476KE15L

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Parametric Data

Risk Rank

Risk Rank is a proprietary algorithm Supplyframe has developed to quantify component risk rank using multiple data points. This ranking helps engineers and buyers determine whether alternates should be sought for parts that are deemed as high risk.

Risk Rank Example

Risk Rank is determined by a combination of factors such as product lifecycle status, price, inventory votality, current inventory availability, and much more. Even the availability of manufacturer specifications and part documentation, such as datasheets and reference designs, have an impact on determining the overall riskiness of a part.

The risk is characterized across three product phases:

  • Design
  • Production
  • Long Term

We focus on the Design Phase on Findchips in our evaluation of Risk.

Design Phase

The design phase of a product is the beginning of the product lifecycle. This is when engineers are doing analysis of components in the marketplace, determining which specifications are most important for their design and assessing the cost impact of using this particular component. While this is early in the product lifecycle, choices at this point can severely impact a product much later on when the product is being made. Additionally, this stage is the one furthest from a product being made, which is why we focus on metrics of stability over time when determining Design Risk.

Risk Rank Breakdown

Risk Rank: Design Risk

What is design risk rank?

Design Risk Rank is determined by in-depth analysis across risk factors, including part availability, functional equivalents, lifecycle, and more.

Resources and Additional Insights

Reference Designs

  • Altera Arria V SoC Power Supply Reference Design - PMP9360.6 - TI Tool Folder
    PMP9360: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
  • Altera Arria V SoC Power Supply Reference Design
    PMP9360.6: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
  • Wi-Fi System Powered by 2 AA Batteries Extends Life By Using Long Power Off Periods Reference Design
    TIDA-00372: TIDA-00372 is a power supply design for use with the CC3200 SimpleLink ™ wireless MCU. This design includes a boost power supply that enables the use of analog circuits such as sensor products that cannot operate at voltages available from two series connected AA Batteries. A nano-power timer enables long power-off cycles and increases battery life.
  • Altera Arria V SoC Power Supply Reference Design
    PMP9360.4: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
  • Altera Arria V SoC Power Supply Reference Design
    PMP9360.5: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
  • Altera Arria V SoC Power Supply Reference Design
    PMP9360.3: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
  • Altera Arria V SoC Power Supply Reference Design
    PMP9360.2: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
  • High efficiency scalable 3-phase 1V/90A PMBus power supply for ASIC core rails
    PMP10962: The PMP10962 reference design is a 3-phase PMBus converter for high current ASIC core rail regulation. It employs DCAP+ control for fast transient response and TI's proprietary AutoBalance for tight steady and dynamic phase-to-phase current balance. It drives three TI NexFET smart power stages for high power density and efficiency. It easily scales-up/scales-down to meet a wide load range. PMBus capability and on-board NVM enable easy design, configuration, and customization, with telemetry of output voltage, current, temperature, and power.
  • Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design
    PMP10613.2: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
  • Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design
    PMP10613.1: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
  • Altera® Stratix® V FPGA Power Solution
    PMP9365: The PMP9365 reference design provides all the power supply rails necessary to power Altera's Stratix V family of FPGAs. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
  • Altera Arria V SoC Power Supply Reference Design
    PMP9360.1: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
  • Altera Arria V SoC FPGA Power Solution Reference Design
    PMP9360: The PMP9360 reference design is a complete power solution for Altera's Arria V™ SoC devices. This design uses several LMZ3 series modules , an LDO, and a DDR termination regulator to provide all the necessary rails to power the SoC chip. This design also shows correct power up sequencing.
  • Altera Arria V SoC Power Supply Reference Design
    PMP9360.7: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
  • Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design - PMP10613.1 - TI Tool Folder
    PMP10613: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.

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