HTSW-103-07-G-SSamtec IncBoard Connector, 3 Contact(s), 1 Row(s), Male, Straight, 0.1 inch Pitch, Solder Terminal, Natural Insulator, Receptacle, LEAD FREE
Part Life Cycle Code
Reach Compliance Code
Factory Lead Time
Contact Finish Mating
GOLD (10) OVER NICKEL (50)
Contact Finish Termination
Gold (Au) - with Nickel (Ni) barrier
LIQUID CRYSTAL POLYMER
Mating Contact Pitch
MULTIPLE MATING PARTS AVAILABLE
Mounting Option 1
Number Of Connectors
Number Of PCB Rows
Number of Rows Loaded
PCB Contact Pattern
Total Number of Contacts
UL Flammability Code
Alternate Parts for: HTSW-103-07-G-S
This table gives cross-reference parts and alternative options found for HTSW-103-07-G-S. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of HTSW-103-07-G-S, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
This reference design consists of a reinforced dualchannel digital isolator: a GaN gate driver: and isolated power supplies. This compact reference design is intended to control GaN in power supplies: DC-to-DC converters: synchronous rectification: solar inverters: and motor control. An open-loop push-pull topology based power supply for gate drivers provides flexibility in PCB routing. The pushpull transformer driver used in the TIDA-00785 operates at 300 kHz: which helps in reducing the size of the isolation transformer: leading to a compact power supply solution.
The TIDA-01442 reference design utilizes the ADC12DJ3200 evaluation module (EVM) to demonstrate a direct RF-sampling receiver for a radar operating in HF: VHF: UHF: L-: S-: C-: and part of X-band. The wide analog input bandwidth and high sampling rate (6.4 GSPS) of the analog-to-digital converter (ADC) provides multiband coverage with a single or dual ADC. The direct RF-sampling capabilities of the ADC reduces the component count by eliminating several down-conversion stages: thereby reducing overall system complexity.
This reference design demonstrates a low-noise: low-dropout (LDO): high-current power stage with no voltage-bias-rail requirement utilizing the LP5922 LDO linear regulator. The power stage demonstrated is ideal for industrial applications. Within industrial applications: low-noise power is often achieved by introducing an LDO at the point-of-load to clean up voltage ripple from a previous switching regulator power stage. LP5922 device makes this possible in an efficient manner by supporting very low dropout: which also eliminates any need for a voltage bias at its input.
This is a wideband complex-receiver reference design and evaluation platform that is ideally suited for use as a feedback receiver for transmitter digital predistortion. The EVM signal chain is ideal for high intermediate-frequency (IF) complex-feedback applications and contains a complex demodulator: TI’s LMH6521 dual-channel DVGA and ADS5402 12-bit 800-MSPS dual-channel ADC. By modifying the onboard filter components: the signal chain is configurable for a variety of frequency plans. The EVM also includes TI’s LMK04808 dual-PLL clock jitter cleaner and generator to provide an onboard low-noise clocking solution. The LMH6521 DVGA gain is controlled through the GUI or alternatively through the high speed connector with an FPGA.
TIDA-01016 is a clocking solution for high dynamic range high speed ADC. RF input signals are directly captured using the RF sampling approach by high speed ADC. The ADC32RF45 is a dual- channel: 14-bit: 3-GSPS RF sampling ADC. The 3-dB input bandwidth is 3.2 GHz: and it captures signals up to 4 GHz. This design showcases the clocking solution using the LMX2582: to achieve the best SNR performance of ADC32RF45 at higher input frequencies used in microwave backhaul applications.
The PMP21065 Reference design operates off a typical 12V DC input to produce several common rails seen in set top boxes today. The key objectives of the design are to be low-cost: small in size and low stand-by power with high efficiency to help customers meet compliance to new regulatory guidelines on STB power consumption.
This reference design consists of an analog front-end (AFE) signal chain for wideband receiver applications using the LMH2832 digitally controlled variable gain amplifier (DVGA) and ADS54J40 analog-to-digital converter (ADC). The design is primarily targeted for upstream DOCSIS 3.1 receiver applications specified for cable modem termination systems (CMTS) and supports up to 196 MHz of upstream signal bandwidth. The circuit solves the filtering and analog signal processing requirements for the DOCSIS 3.1 standard: which makes it easier for system designers to readily incorporate the design on the CMTS-side of the upstream signal path.
The PMP9449 reference design provides all the power supply rails necessary to power Altera's Arria® V GX family of FPGAs. It utilizes a TPS38600 to monitor the input supply and provide power on sequencing. This design features low cost: small footprint discrete ICs and is powered from a single 5V input.
This reference design shows an active integrator design that covers wide-input current range for Rogowski Coil with accuracy: linearity: stability and repeatability. The integrator uses a precision amplifier with very-low offset and temperature drift. Two configurations of the integrator are shown. One is for precision measurement with less than 3O-phase error and the other is for fast response time (< 15-ms RC). While the output signal is bipolar: optional level shifting stage can be used when unipolar output is required.
An inductive sensing (LDC)-based event counting design providing a robust and low-cost interface for speed measurement and event counting applications. The solution doesn't require magnets and reliably operates in environments with dirt: moisture or oil that usually pose challenges for alternate sensing technologies.
The TIDA-00720 reference design shows a method to extend battery life by power cycling. The power cycling concept consist in time interval period that enables the power management devices for just enough time for the microcontroller to execute the program: transmit data or collect data. Some of the MCUs have sleep modes with low stand-by currents: but the power management devices will continue to dissipate power if they are left enabled. The current leakage is higher during the enabled mode and will add up to the total power waste during the MCU sleep cycles.This design is ideal for systems that operate for various years without replacing the battery; these systems do not need to run constantly instead they operate in periodic intervals of seconds: minutes or even an hour in between operating time.
This 16-button stainless steel keypad: which utilizes TI's inductive touch technology: demonstrates highly sensitive buttons on a single piece of 0.6mm thick stainless steel metal. The design utilizes a MUXed approach to implement many buttons with a single LDC1614. The design is applicable to any metal or non-metal surface completely enclosing the system: enabling a sleek waterproof (IP67) design.
The RF sampling receiver captures signals directly in the radio frequency (RF) band. In a multi-band application the desired signals are not very wide band but they are spaced far apart within the spectrum. The reference design captures signals in different RF bands and digitally down-converts them to baseband.The reference design showcases the ADC32RF80 dual channel: 14-bit: 3-GSPS RF sampling telecom receiver. The device includes two digital down converters (DDC) per channel. The DDC offers decimation values from 8 to 32 and includes a 16-bit numerically controlled. With the high sampling rate of the ADC32RF80 the reference design captures a large swatch of RF spectrum which contains signals in multiple bands and potentially undesired interferers. The DDC independently mixes the desired bands to digital baseband. Decimation reduces the output data rate to a lower level and provides digital filtering around the desired band to eliminate interference and to improve signal-to-noise ratio performance. This feature is critical for high end telecommunication receivers that require high dynamic range.
The TSW1265EVM is an example design of a wideband RF to digital dual receiver solution capable of digitizing up to 125MHz of spectrum. The system provides a reference on how to use the ADS4249: LMH6521: LMK0480x: and a dual mixer to achieve this. This reference EVEM coupled with a capture card such as the TSW1400 can be used to capture and analyze narrow band and wideband signals. Instructions are provided on how to change the LO and IF frequencies for different application needs. The TIDA-00073 was implemented with hardware from the TSW1265EVM.
The RF sampling architecture offers an alternative to the traditional super-heterodyne architecture. An RF sampling analog-to-digital converter (ADC) operates at a high sampling rate and converts signals directly from radio frequencies (RF) to digital. Because of the high sampling rate: the RF sampling architecture supports very wide signal bandwidths. Higher signal bandwidths increase the capacity of the system allowing for faster data transmission or greater user access.The reference design features the ADC32RF45 which is a dual channel:14-bit resolution ADC sampling up to 3-GSPS. The maximum signal bandwidth is set by the ADC sampling rate divided by two. With this reference design the signal bandwidth capability exceeds 1-GHz. The maximum input frequency is set by the input bandwidth of the input buffers of the ADC and the input transformers. This reference design allows direct capture of RF signals up to 4-GHz which is suitable for all of the key telecommunication bands and S-band RADAR applications. The design includes an optimized clocking solution for maintaining the JESD204B serialized data interface and achieving the highest signal-to-noise ratio (SNR) performance.
This “18-bit: 2-Msps Isolated Data Acquisition Reference Design to achieve maximum SNR and sampling rate” illustrates how to overcome performance-limiting challenges typical of isolated data acquisition system design:Maximizing sampling rate by minimizing propagation delay introduced by digital isolatorMaximizing high-frequency AC signal chain performance (SNR) by effectively mitigating ADC sampling clock jitter introduced by the digital isolator
Power over Ethernet (PoE) enables power to be delivered over the same ethernet cable as data with no danger of cross-talk: interference: or corruption of the data streams. This reference design showcases end-to-end power tree for an IP network camera powered using PoE or 12-V adapter based on the TI’s DaVinci™ Digital Media Processor or different application processor. The power tree also derives rails required for different peripherals of an IP network camera like: Image sensor: motor control: Ethernet PHY: RS485 interface: IR LED illumination: audio: motion sensing and the alarm interface.
This reference design includes a power management circuit which is capable of controlling a remote USB charging port in an automotive application environment. The circuit can be supplied directly from the car battery rail. It uses a small and highly efficient step down converter: the TPS62130A-Q1: to regulate the required USB bus voltage for charging with charge currents up to 2.5A.The USB charging port is controlled and protected by using a USB charging controller: the TPS2549-Q1: this charging controller is also used to monitor the charge current for adjusting the output voltage of the TPS62130A-Q1. This way the voltage drop across the cable connection to the USB port is compensated. In addition: the TPS2549-Q1 generates all required signals to indicate a USB charging port to the equipment connected to the port.
This reference design enables a cost-effective and low-power data acquisition system that provides an alternative to FPGA-based systems. It features a single-ended: high-impedance input that can be used in a wide number of applications: including portable instrumentation and digitizers.The reference design utilizes the ADS4122 analog-to-digital converter (ADC): along the with the OPA656 and THS4541 operational amplifiers (op amps) to develop a 12-bit: 20-MSPS digitizer for the BeagleBone Cape form factor. The expansion board devleoped in this reference design interfaces with the BeagleBone Black development platform: which is a low-cost: open-source: community-supported environment based on the ARM Cortex-A8 processor.
This design, featuring the TMS320F2803x Piccolo microcontroller, implements a high efficiency multi-channel DC-DC LED control system for typically automotive lighting systems. The design support up to 6 channels of LED controls each with maximum of 1.2A current driving capabilities. With a
The TI TPS1623 VR12.1 reference design, supporting Intel® Pentium™ N3700 , uses TI's driverless PWM architecture with TI power stages for high power density, high efficiency, and low component count while meeting Intel voltage tolerance requirements with low ripple, tight loadline
This reference design is a universal line 85-265VAC input to 80V/50W power supply in a small form-factor, cost-effective design. It uses the UCC28704 controller. The design features an optional FET-startup circuit for low standby power and achieves over 91% efficiency. The PMP20545 Board is a 4-layer, 1-oz copper weight per layer, 80mm x 60mm board with 24mm max component height. This design is Non-isolated.
The TIDA-01281 reference design is low cost: high efficiency: isolated RS-485: I2C & CAN communication module solution intended for use in industrial systems such as Uninterruptable Power Supplies (UPS) and energy storage banks that require isolated communication and isolated power for RS-485/I2C/CAN transceivers. The design has on-board C2000-Piccolo microcontroller for handling the communications protocol for each of interfaces. The board has in-built: low component count: high efficiency: primary side controlled isolated power supply to generate secondary power for communication transceivers eliminating the need for opto-coupler feedback circuits. The TIDA-01281 design is tested for data transmission under various conditions and under EFT and ESD environment: highlighting the performance of TI devices for robust data transmission in harsh environments.
The PMP10283 reference design provides 30V/100W and -30V/100W outputs from AC line voltage to a single LLC resonant converter stage. This design is featured with its low circuit cost and high efficiency (over 90% @ 120VAC full load and ~92% @ 240VAC full load). This design uses the UCC25600 reson
PMP9484 is a 100W highly efficient and compact automotive amplifier reference design which can be used in 50W +50W stereo or 100W woofer applications. The design is broadly divided into three main stages:1.) Highly efficient single-phase synchronous boost converter using the LM5122 co
The TPS53355 Inductor-On-Top step-down buck converter design enables high power density through reduction of X-Y PCB area and results in >86% efficiency with only 1.8W of power loss and 6mV of output voltage ripple requiring only 5x100uF ceramic output caps.
The MSP430X09X can operate form ultra-low voltages (ULV) in the range of 0.9V to 1.65V; however most of the devices in the system requires higher voltages. TIDA-00599 provides a solution for those companion devices that requires 1.8V and 3.3V input voltages.A 3.3V voltage rail is generated from a 0.9V to 1.65 V batteries using the TPS61221 boost converter and a 1.8V voltage rail is generated using a high PSRR LDO (LP5910) connected in series with the boost converter output voltage rail. The combine output current is 100 mA at 1.65V input voltage and 50 mA at 0.90 V input voltage.This power solution is deal to power sensors and peripherals from the same ultra-low voltage source powering the MSP430 family line.
This reference design includes a power management circuit capable of controlling a remote USB charging port in an automotive application environment. The circuit can be supplied directly from the car battery rail. It uses a small and highly efficient step-down converter: the TPS62130A-Q1: to regulate the required USB bus voltage for charging with charge currents up to 2.5A.The USB charging port is controlled and protected by using a USB charging controller: the TPS2549-Q1: which is also used to monitor the charge current for adjusting the output voltage of the TPS62130A-Q1. This enables the voltage drop across the cable connection to the USB port to be compensated. In addition: the TPS2549-Q1 generates all required signals to indicate a USB charging port to the equipment connected to the port.The required compensation for the voltage drop across the cable connection to USB varies with the cable length. This reference design presets the cable compensation for different cable lengths. It uses a rail-to-rail operational amplifier: OPA348: to adjust the current sinked from the TPS2549-Q1 into the TPS62130-Q1 and set the output voltage of the TPS62130A-Q1 accordingly.
The objective of the TIDA-00560 TI Design is to demonstrate a multi-channel LED driver as required in PLC I/O modules to indicate the status of several analog, digital input, and output channels. Important requirements for such a design like low static current, low component count, minimal PCB re
This automotive door control switch reference design showcases a proof-of-concept solution for an automotive door control switch panel that communicates wirelessly to the door side mirror, window lift and door lock mechanisms. Using TI's automotive qualified <a href=http://www.ti.com/lsds/ti/wir
Li-Ion battery formation and electrical testing require accurate voltage and current control: usually to better than ±0.05% over the specified temperature range. This reference design proposes a solution for high-current (up to 50 A) battery tester applications supporting input (bus) voltages from 8 V–16 V and output load (battery) voltages from 0V–5V. The design utilizes an integrated multi-phase bidirectional controller: LM5170: combined with a high precisiondata converters and instrumentation amplifiers to achieve charge and discharge accuracies of 0.01% full scale. To maximize battery capacity and minimize battery formation time: the design uses highly-accurate constant current (CC) and constant voltage (CV) calibration loops with a simplified interface. All key design theories are described guiding users through the part selection process and optimization. Finally: schematic: board layout: hardware testing: and results are also presented.
This reference design provides a multi-phase solution for a wide range of current battery test applications. Leveraging the dual phase buck/boost controller LM5170's daisy chain configuration gives the design the ability to achieve 100A charging/discharging rates. Utilizing high accuracy constant current (CC) and constant voltage (CV) calibration loops: TIDA-01041 can achieve up to 0.01% voltage control accuracy. All key design theories are described guiding users through the part selection process and optimization. Finally: schematic: board layout: hardware testing: and results are also presented.
The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters: LDOs: and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing: a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
The PMP10654 reference design is a dual isolated outputs Fly-Buck power module for single IGBT driver bias. The two voltage rails are suitable for providing the positive and negative bias to an IGBT gate driver in motor drives for EV/HEV and industrial applications.