Part Details for P1753S-25PGMB by Pyramid Semiconductor Corporation
Overview of P1753S-25PGMB by Pyramid Semiconductor Corporation
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Part Details for P1753S-25PGMB
P1753S-25PGMB CAD Models
P1753S-25PGMB Part Data Attributes
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P1753S-25PGMB
Pyramid Semiconductor Corporation
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Datasheet
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P1753S-25PGMB
Pyramid Semiconductor Corporation
Memory Management Unit, 16-Bit, 256 Pages, CMOS, CPGA68, PGA-68
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Pbfree Code | No | |
Rohs Code | No | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | PYRAMID SEMICONDUCTOR CORP | |
Part Package Code | PGA | |
Package Description | PGA-68 | |
Pin Count | 68 | |
Reach Compliance Code | compliant | |
ECCN Code | 3A001.A.2.C | |
HTS Code | 8542.31.00.01 | |
Additional Feature | 6 EDAC BITS FOR DETECTION OF DOUBLE ERROR AND CORRECTION OF SINGLE ERROR ON DATA BUS | |
Address Bus Width | 16 | |
Address Translation Time-Max | 23 ns | |
Bus Compatibility | PACE1750 | |
Clock Frequency-Max | 40 MHz | |
External Data Bus Width | 16 | |
JESD-30 Code | S-CPGA-P68 | |
Low Power Mode | NO | |
Number of Addressable Pages | 256 | |
Number of Terminals | 68 | |
Operating Temperature-Max | 125 °C | |
Operating Temperature-Min | -55 °C | |
Package Body Material | CERAMIC, METAL-SEALED COFIRED | |
Package Code | PGA | |
Package Shape | SQUARE | |
Package Style | GRID ARRAY | |
Peak Reflow Temperature (Cel) | NOT SPECIFIED | |
Qualification Status | Not Qualified | |
Screening Level | MIL-STD-883 | |
Supply Voltage-Max | 5.5 V | |
Supply Voltage-Min | 4.5 V | |
Supply Voltage-Nom | 5 V | |
Surface Mount | NO | |
Technology | CMOS | |
Temperature Grade | MILITARY | |
Terminal Form | PIN/PEG | |
Terminal Position | PERPENDICULAR | |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED | |
uPs/uCs/Peripheral ICs Type | MEMORY MANAGEMENT UNIT |