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XC6SLX9-2CSG324I by:
AMD Xilinx

Field Programmable Gate Array, 715 CLBs, 667MHz, 9152-Cell, CMOS, PBGA324, 15 X 15 MM, 0.80 MM PITCH, LEAD FREE, BGA-324

Part Details for XC6SLX9-2CSG324I by AMD Xilinx

Results Overview of XC6SLX9-2CSG324I by AMD Xilinx

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XC6SLX9-2CSG324I Information

XC6SLX9-2CSG324I by AMD Xilinx is a Field Programmable Gate Array.
Field Programmable Gate Arrays are under the broader part category of Programmable Logic Devices.

Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.

Price & Stock for XC6SLX9-2CSG324I

Part # Distributor Description Stock Price Buy
Chip 1 Exchange INSTOCK 33735
RFQ
Vyrian Programmable ICs 1201
RFQ
Win Source Electronics IC FPGA 200 I/O 324CSBGA 7000
  • 5 $12.4322
  • 10 $11.6302
  • 16 $11.2291
  • 23 $10.4271
  • 29 $10.0260
  • 37 $9.6250
$9.6250 / $12.4322 Buy Now

US Tariff Estimator: XC6SLX9-2CSG324I by AMD Xilinx

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XC6SLX9-2CSG324I
AMD Xilinx
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Part Details for XC6SLX9-2CSG324I

XC6SLX9-2CSG324I CAD Models

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XC6SLX9-2CSG324I Part Data Attributes

XC6SLX9-2CSG324I AMD Xilinx
Buy Now Datasheet
Compare Parts:
XC6SLX9-2CSG324I AMD Xilinx Field Programmable Gate Array, 715 CLBs, 667MHz, 9152-Cell, CMOS, PBGA324, 15 X 15 MM, 0.80 MM PITCH, LEAD FREE, BGA-324
Pbfree Code Yes
Rohs Code Yes
Part Life Cycle Code Transferred
Part Package Code BGA
Package Description Lfbga, Bga324,18x18,32
Pin Count 324
Reach Compliance Code Compliant
ECCN Code 3A991.D
HTS Code 8542.39.00.01
Clock Frequency-Max 667 Mhz
Combinatorial Delay of a CLB-Max 0.26 Ns
JESD-30 Code S-PBGA-B324
JESD-609 Code e1
Length 15 Mm
Moisture Sensitivity Level 3
Number of CLBs 715
Number of Inputs 200
Number of Logic Cells 9152
Number of Outputs 200
Number of Terminals 324
Operating Temperature-Max 100 °C
Operating Temperature-Min -40 °C
Organization 715 Clbs
Package Body Material Plastic/Epoxy
Package Code LFBGA
Package Equivalence Code BGA324,18X18,32
Package Shape Square
Package Style Grid Array, Low Profile, Fine Pitch
Peak Reflow Temperature (Cel) 260
Programmable Logic Type Field Programmable Gate Array
Qualification Status Not Qualified
Seated Height-Max 1.5 Mm
Supply Voltage-Max 1.26 V
Supply Voltage-Min 1.14 V
Supply Voltage-Nom 1.2 V
Surface Mount Yes
Technology Cmos
Temperature Grade Industrial
Terminal Finish Tin Silver Copper
Terminal Form Ball
Terminal Pitch 0.8 Mm
Terminal Position Bottom
Time@Peak Reflow Temperature-Max (s) 30
Width 15 Mm

Alternate Parts for XC6SLX9-2CSG324I

This table gives cross-reference parts and alternative options found for XC6SLX9-2CSG324I. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of XC6SLX9-2CSG324I, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.

Part Number Manufacturer Composite Price Description Compare
XC6SLX9-2CSG324C AMD Xilinx $5.8839 Field Programmable Gate Array, 715 CLBs, 667MHz, 9152-Cell, CMOS, PBGA324, 15 X 15 MM, 0.80 MM PITCH, LEAD FREE, BGA-324 XC6SLX9-2CSG324I vs XC6SLX9-2CSG324C
XC6SLX9-2CSG324C AMD Check for Price Field Programmable Gate Array, 715 CLBs, 667MHz, 9152-Cell, CMOS, PBGA324, 15 X 15 MM, 0.80 MM PITCH, LEAD FREE, BGA-324 XC6SLX9-2CSG324I vs XC6SLX9-2CSG324C
XC6SLX9-2CSG324Q AMD Xilinx Check for Price Field Programmable Gate Array, XC6SLX9-2CSG324I vs XC6SLX9-2CSG324Q
equivalents icon

XC6SLX9-2CSG324I Related Parts

XC6SLX9-2CSG324I Frequently Asked Questions (FAQ)

  • The maximum power consumption of the XC6SLX9-2CSG324I is approximately 1.5W, but this can vary depending on the specific application and usage.

  • To implement a CDC in the XC6SLX9-2CSG324I, you can use the Xilinx-provided IP cores, such as the Clock Domain Crossing (CDC) IP, or implement a custom CDC using asynchronous FIFOs and synchronization logic.

  • The maximum frequency of the XC6SLX9-2CSG324I is approximately 400 MHz, but this can vary depending on the specific application and usage.

  • To optimize power consumption, use the Xilinx Power Estimator (XPE) tool to estimate power consumption, and then apply power-saving techniques such as clock gating, voltage scaling, and dynamic voltage and frequency scaling (DVFS).

  • The XC6SLX9-2CSG324I has a total of 324 I/O pins, with 240 user I/O pins and 84 dedicated configuration pins.

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