Datasheets
AD9268BCPZ-105 by: Analog Devices Inc

16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter

Part Details for AD9268BCPZ-105 by Analog Devices Inc

Results Overview of AD9268BCPZ-105 by Analog Devices Inc

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Applications Education and Research Internet of Things (IoT) Computing and Data Storage Aerospace and Defense Healthcare Telecommunications Automotive

AD9268BCPZ-105 Information

AD9268BCPZ-105 by Analog Devices Inc is an Analog to Digital Converter.
Analog to Digital Converters are under the broader part category of Converters.

A converter is an electrical circuit that transforms electric energy into a different form that will support a elecrical load needed by a device. Read more about Converters on our Converters part category page.

Price & Stock for AD9268BCPZ-105

Part # Distributor Description Stock Price Buy
Rochester Electronics AD9268 - ADC, Flash Method, 16-Bit, 2 Channel, Parallel, Word Access, CMOS RoHS: Compliant Status: Active Min Qty: 1 1003
  • 1 $235.4900
  • 25 $230.7800
  • 100 $221.3600
  • 500 $211.9400
  • 1,000 $200.1700
$200.1700 / $235.4900 Buy Now
DISTI # AD9268BCPZ-105
Richardson RFPD CONVERTER - ADC RoHS: Compliant Min Qty: 2 0
  • 2 $230.5900
  • 3 $227.5500
  • 5 $224.5900
  • 10 $218.9100
  • 25 $216.1800
$216.1800 / $230.5900 Buy Now
Win Source Electronics IC ADC 16BIT PIPELINED 64LFCSP 2900
  • 1 $69.5660
  • 2 $67.3920
  • 3 $65.2180
  • 4 $63.0440
  • 6 $56.5220
$56.5220 / $69.5660 Buy Now

Part Details for AD9268BCPZ-105

AD9268BCPZ-105 CAD Models

AD9268BCPZ-105 Part Data Attributes

AD9268BCPZ-105 Analog Devices Inc
Buy Now Datasheet
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AD9268BCPZ-105 Analog Devices Inc 16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter
Pbfree Code No
Rohs Code Yes
Part Life Cycle Code Active
Ihs Manufacturer ANALOG DEVICES INC
Part Package Code QFN
Package Description 9 X 9 MM, ROHS COMPLIANT, M0-220VMMD-4, LFCSP-64
Pin Count 64
Manufacturer Package Code CP-64-6
Reach Compliance Code compliant
ECCN Code 3A001.A.5.A.5
HTS Code 8542.39.00.01
Samacsys Manufacturer Analog Devices
Analog Input Voltage-Max 2 V
Analog Input Voltage-Min
Conversion Time-Max 0.0095 µs
Converter Type ADC, FLASH METHOD
JESD-30 Code S-XQCC-N64
JESD-609 Code e3
Length 9 mm
Linearity Error-Max (EL) 0.0078%
Moisture Sensitivity Level 3
Number of Analog In Channels 2
Number of Bits 16
Number of Functions 1
Number of Terminals 64
Operating Temperature-Max 85 °C
Operating Temperature-Min -40 °C
Output Bit Code OFFSET BINARY, 2'S COMPLEMENT BINARY, GRAY CODE
Output Format PARALLEL, WORD
Package Body Material UNSPECIFIED
Package Code HVQCCN
Package Equivalence Code LCC64,.35SQ,20
Package Shape SQUARE
Package Style CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Cel) 260
Qualification Status Not Qualified
Sample Rate 105 MHz
Sample and Hold / Track and Hold SAMPLE
Seated Height-Max 1 mm
Supply Voltage-Nom 1.8 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish Matte Tin (Sn)
Terminal Form NO LEAD
Terminal Pitch 0.5 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Width 9 mm

Alternate Parts for AD9268BCPZ-105

This table gives cross-reference parts and alternative options found for AD9268BCPZ-105. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of AD9268BCPZ-105, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.

Part Number Manufacturer Composite Price Description Compare
AD9251BCPZRL7-40 Analog Devices Inc Check for Price 14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9268BCPZ-105 vs AD9251BCPZRL7-40
AD9231BCPZRL7-20 Analog Devices Inc Check for Price 12-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9268BCPZ-105 vs AD9231BCPZRL7-20
AD9251BCPZ-20 Analog Devices Inc $24.1983 14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9268BCPZ-105 vs AD9251BCPZ-20
AD9231BCPZRL7-40 Analog Devices Inc Check for Price 12-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9268BCPZ-105 vs AD9231BCPZRL7-40
AD9258BCPZ-105 Analog Devices Inc Check for Price 14-Bit, 125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) AD9268BCPZ-105 vs AD9258BCPZ-105
AD9251BCPZ-80 Analog Devices Inc $60.6679 14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9268BCPZ-105 vs AD9251BCPZ-80
AD9251BCPZ-40 Analog Devices Inc $34.1494 14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9268BCPZ-105 vs AD9251BCPZ-40
AD9231BCPZRL7-80 Analog Devices Inc Check for Price 12-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9268BCPZ-105 vs AD9231BCPZRL7-80
AD9258BCPZ-80 Analog Devices Inc Check for Price 14-Bit, 125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) AD9268BCPZ-105 vs AD9258BCPZ-80
AD9258BCPZ-125 Analog Devices Inc Check for Price 14-Bit, 125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) AD9268BCPZ-105 vs AD9258BCPZ-125

AD9268BCPZ-105 Related Parts

AD9268BCPZ-105 Frequently Asked Questions (FAQ)

  • A 4-layer PCB with a solid ground plane and a separate analog and digital power plane is recommended. Keep the analog and digital signals separate and avoid crossing them over each other. Use a common mode filter and a ferrite bead to filter the power supply.

  • Use a low-jitter clock source (<100 ps) and a 50-ohm transmission line to drive the clock input. Ensure the clock signal is clean and free of noise. Use a clock buffer or a clock conditioner if necessary.

  • Power up the analog supply (AVDD) first, followed by the digital supply (DVDD). Ensure the analog supply is stable before applying the digital supply. Use a power-up sequence controller or a voltage supervisor if necessary.

  • Use a DDR (Double Data Rate) interface to capture the output data. Ensure the FPGA or ASIC is configured to capture data on both the rising and falling edges of the clock. Use a data alignment circuit if necessary to align the data with the clock.

  • Use the internal calibration mode to calibrate the ADC. Apply a full-scale input signal and use the calibration registers to adjust the offset and gain. Use an external calibration signal if necessary.

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