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Converters / Analog to Digital Converters / AD9680BCPZ-1000
Datasheets
AD9680BCPZ-1000 by: Analog Devices Inc

14-Bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS JESD204B, Dual Analog-to-Digital Converter

Part Details for AD9680BCPZ-1000 by Analog Devices Inc

Results Overview of AD9680BCPZ-1000 by Analog Devices Inc

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AD9680BCPZ-1000 Information

AD9680BCPZ-1000 by Analog Devices Inc is an Analog to Digital Converter.
Analog to Digital Converters are under the broader part category of Converters.

A converter is an electrical circuit that transforms electric energy into a different form that will support a elecrical load needed by a device. Read more about Converters on our Converters part category page.

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Price & Stock for AD9680BCPZ-1000

Part # Distributor Description Stock Price Buy
DISTI # 60AK7878
Newark Adc, 14Bit, 1Gsps, Lfcsp-Ep-64, Resolution (Bits):14Bit, Sampling Rate:1Gsps, Input Channel Type:Differential, Single Ended, Data Interface:Serial, Spi, Supply Voltage Type:Single, Supply Voltage Min:1.22V, Supply Voltage Max:3.4V Rohs Compliant: Yes |Analog Devices AD9680BCPZ-1000 RoHS: Compliant Min Qty: 1 Package Multiple: 1 Date Code: 1 Container: Bulk 0
  • 1 $1,010.5400
$1,010.5400 Buy Now
DISTI # AD9680BCPZ-1000
Richardson RFPD CONVERTER - ADC RoHS: Compliant Min Qty: 1 0
  • 1 $1,099.4700
  • 3 $1,084.9900
  • 5 $1,070.9100
  • 10 $1,043.8000
  • 25 $1,030.7500
$1,030.7500 / $1,099.4700 Buy Now
Win Source Electronics IC ADC 14BIT 1000MSPS 64-LFCSP 100
  • 1 $594.2857
$594.2857 Buy Now

Part Details for AD9680BCPZ-1000

AD9680BCPZ-1000 CAD Models

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AD9680BCPZ-1000 Part Data Attributes

Parametric Data
AD9680BCPZ-1000 Analog Devices Inc
Buy Now Datasheet
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AD9680BCPZ-1000 Analog Devices Inc 14-Bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS JESD204B, Dual Analog-to-Digital Converter
Pbfree Code No
Rohs Code Yes
Part Life Cycle Code Active
Ihs Manufacturer ANALOG DEVICES INC
Part Package Code CSP
Package Description LFCSP-64
Pin Count 64
Manufacturer Package Code CP-64-15
Reach Compliance Code compliant
ECCN Code 3A001.A.5.A.4
HTS Code 8542.39.00.01
Samacsys Manufacturer Analog Devices
Analog Input Voltage-Max 1.7 V
Analog Input Voltage-Min -1.7 V
Converter Type ADC, PROPRIETARY METHOD
JESD-30 Code S-XQCC-N64
JESD-609 Code e3
Length 9 mm
Linearity Error-Max (EL) 0.0421%
Moisture Sensitivity Level 3
Number of Analog In Channels 2
Number of Bits 14
Number of Functions 1
Number of Terminals 64
Operating Temperature-Max 85 °C
Operating Temperature-Min -40 °C
Output Bit Code OFFSET BINARY, 2'S COMPLEMENT BINARY
Output Format SERIAL
Package Body Material UNSPECIFIED
Package Code HVQCCN
Package Equivalence Code LCC64,.35SQ,20
Package Shape SQUARE
Package Style CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Cel) 260
Sample Rate 1000 MHz
Sample and Hold / Track and Hold SAMPLE
Seated Height-Max 0.8 mm
Supply Voltage-Nom 1.25 V
Surface Mount YES
Temperature Grade INDUSTRIAL
Terminal Finish Matte Tin (Sn)
Terminal Form NO LEAD
Terminal Pitch 0.5 mm
Terminal Position QUAD
Width 9 mm

Alternate Parts for AD9680BCPZ-1000

This table gives cross-reference parts and alternative options found for AD9680BCPZ-1000. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of AD9680BCPZ-1000, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.

Part Number Manufacturer Composite Price Description Compare
AD9680BCPZRL7-1000 Analog Devices Inc Check for Price 14-Bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS JESD204B, Dual Analog-to-Digital Converter AD9680BCPZ-1000 vs AD9680BCPZRL7-1000

AD9680BCPZ-1000 Related Parts

AD9680BCPZ-1000 Frequently Asked Questions (FAQ)

  • A 4-layer PCB with a solid ground plane and a separate analog and digital power plane is recommended. Keep the analog and digital signals separate and avoid crossing them over each other. Use a common mode filter and a low-pass filter to reduce noise and ensure signal integrity.

  • Use a low-jitter clock source (<100 ps) and ensure that the clock signal is properly terminated. Use a clock buffer or a clock distribution network to ensure that the clock signal is clean and stable. Also, ensure that the clock frequency is within the recommended range (100 MHz to 1.25 GHz).

  • Power up the device in the following sequence: AVDD, DVDD, and then CLK+. Ensure that the power supplies are stable and within the recommended voltage range before applying the clock signal. Also, ensure that the device is in a known state (e.g., reset) before applying the clock signal.

  • Use a low-noise, low-impedance signal source and ensure that the signal is properly terminated. Use a high-quality, low-loss transmission line or a shielded cable to connect the signal source to the AD9680BCPZ-1000. Also, ensure that the signal amplitude is within the recommended range (0.5 V to 1.5 V) and that the signal bandwidth is within the Nyquist bandwidth of the ADC.

  • Perform a full-scale calibration after power-up and after any changes to the clock frequency or analog input signal. Use the built-in calibration engine to adjust the ADC's offset, gain, and linearity. Also, perform a periodic calibration to compensate for any drift or changes in the device's performance over time.

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