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2.5-V SSTL-II phase-lock loop clock driver for double data-rate synchronous DRAM applications 48-TSSOP 0 to 85
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
Part # | Distributor | Description | Stock | Price | Buy | |
---|---|---|---|---|---|---|
DISTI #
595-CDCV857ADGGG4
|
Mouser Electronics | Clock Drivers & Distribution 2.5V Clock RoHS: Compliant | 0 |
|
Order Now | |
|
Rochester Electronics | CDCV857A 2.5-V SSTL-II phase-lock loop clock driver for double data-rate synchronous DRAM applications RoHS: Compliant Status: Not Recommended for New Designs Min Qty: 1 | 7 |
|
$4.6400 / $5.4600 | Buy Now |
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CDCV857ADGGG4
Texas Instruments
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Datasheet
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CDCV857ADGGG4
Texas Instruments
2.5-V SSTL-II phase-lock loop clock driver for double data-rate synchronous DRAM applications 48-TSSOP 0 to 85
|
Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Not Recommended | |
Ihs Manufacturer | TEXAS INSTRUMENTS INC | |
Part Package Code | TSSOP | |
Package Description | GREEN, PLASTIC, TSSOP-48 | |
Pin Count | 48 | |
Reach Compliance Code | compliant | |
HTS Code | 8542.39.00.01 | |
Samacsys Manufacturer | Texas Instruments | |
Family | 857 | |
Input Conditioning | DIFFERENTIAL | |
JESD-30 Code | R-PDSO-G48 | |
JESD-609 Code | e4 | |
Length | 12.5 mm | |
Load Capacitance (CL) | 14 pF | |
Logic IC Type | PLL BASED CLOCK DRIVER | |
Max I(ol) | 0.012 A | |
Moisture Sensitivity Level | 2 | |
Number of Functions | 1 | |
Number of Inverted Outputs | ||
Number of Terminals | 48 | |
Number of True Outputs | 10 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | ||
Output Characteristics | 3-STATE | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TSSOP | |
Package Equivalence Code | TSSOP48,.3,20 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
Packing Method | TUBE | |
Peak Reflow Temperature (Cel) | 260 | |
Power Supply Current-Max (ICC) | 12 mA | |
Qualification Status | Not Qualified | |
Same Edge Skew-Max (tskwd) | 0.075 ns | |
Seated Height-Max | 1.2 mm | |
Supply Voltage-Max (Vsup) | 2.7 V | |
Supply Voltage-Min (Vsup) | 2.3 V | |
Supply Voltage-Nom (Vsup) | 2.5 V | |
Surface Mount | YES | |
Temperature Grade | OTHER | |
Terminal Finish | NICKEL PALLADIUM GOLD | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.5 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 6.1 mm | |
fmax-Min | 180 MHz |
This table gives cross-reference parts and alternative options found for CDCV857ADGGG4. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of CDCV857ADGGG4, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
Part Number | Description | Manufacturer | Compare |
---|---|---|---|
CDCV857ADGGRG4 | 2.5-V SSTL-II phase-lock loop clock driver for double data-rate synchronous DRAM applications 48-TSSOP 0 to 85 | Texas Instruments | CDCV857ADGGG4 vs CDCV857ADGGRG4 |
CDCVF857DGGR | 2.5-V phase lock loop DDR clock driver 48-TSSOP -40 to 85 | Texas Instruments | CDCV857ADGGG4 vs CDCVF857DGGR |
CDCV857ADGG | 2.5-V SSTL-II phase-lock loop clock driver for double data-rate synchronous DRAM applications 48-TSSOP 0 to 85 | Texas Instruments | CDCV857ADGGG4 vs CDCV857ADGG |
CDCV857DGG | 1:10 DDR Phase-Lock Loop Clock Driver 48-TSSOP 0 to 70 | Texas Instruments | CDCV857ADGGG4 vs CDCV857DGG |
CDCVF857DGGG4 | 2.5-V phase lock loop DDR clock driver 48-TSSOP -40 to 85 | Texas Instruments | CDCV857ADGGG4 vs CDCVF857DGGG4 |