Parametric results for: 5962-9957201NUA under Field Programmable Gate Arrays

All Filters Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Number of CLBs Number of Equivalent Gates Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Programmable Logic Type Qualification Status Rohs Code Screening Level Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form Combinatorial Delay of a CLB-Max (1)

800 ps 1

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S-PBGA-B432 1

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e0 1

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40 mm 1

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Manufacturer (1)

AMD Xilinx 1

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Number of CLBs (1)

1536 1

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Number of Equivalent Gates (1)

322970 1

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Number of Inputs (1)

316 1

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Number of Logic Cells (1)

6912 1

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Number of Outputs (1)

316 1

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432 1

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125.0 °C 1

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-55.0 °C 1

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322970 GATES 1

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PLASTIC/EPOXY 1

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LBGA 1

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BGA432,31X31,50 1

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Package Shape (1)

SQUARE 1

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GRID ARRAY, LOW PROFILE 1

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Obsolete 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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Not Qualified 1

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No 1

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Screening Level (1)

MIL-PRF-38535 1

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1.7 mm 1

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2.625 V 1

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2.375 V 1

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Supply Voltage-Nom (1)

2.5 V 1

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YES 1

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CMOS 1

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Temperature Grade (1)

MILITARY 1

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TIN LEAD 1

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BALL 1

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