Parametric results for: CD74HCT73M96 under FF/Latches

All Filters Additional Feature Family JESD-30 Code JESD-609 Code Logic IC Type Manufacturer Max I(ol) Moisture Sensitivity Level Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Polarity Package Body Material Package Code Package Shape Package Style Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type

MASTER SLAVE OPERATION 2

3 hits Apply

Family (1)

HCT 3

3 hits Apply

R-PDSO-G14 3

3 hits Apply

e4 1

3 hits Apply

J-K FLIP-FLOP 3

3 hits Apply

Manufacturer (3)

Harris Semiconductor 1 Intersil Corporation 1 Texas Instruments 1

3 hits Apply

6 mA 1

3 hits Apply

1 1

3 hits Apply

Number of Bits (1)

2 3

3 hits Apply

Number of Functions (1)

2.0 3

3 hits Apply

14 3

3 hits Apply

125.0 °C 3

3 hits Apply

-55.0 °C 3

3 hits Apply

COMPLEMENTARY 3

3 hits Apply

PLASTIC/EPOXY 3

3 hits Apply

Package Code (1)

SOP 1

3 hits Apply

RECTANGULAR 3

3 hits Apply

SMALL OUTLINE 3

3 hits Apply

Propagation Delay (tpd) (1)

57 ns 1

3 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 3

3 hits Apply

Surface Mount (1)

YES 3

3 hits Apply

Trigger Type (1)

NEGATIVE EDGE 3

3 hits Apply