Parametric results for: EPM5128JC-1 under Programmable Logic Devices

All Filters Additional Feature Clock Frequency-Max In-System Programmable JESD-30 Code JESD-609 Code JTAG BST Length Manufacturer Number of Dedicated Inputs Number of I/O Lines Number of Macro Cells Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Output Function Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Pbfree Code Peak Reflow Temperature (Cel) Programmable Logic Type Propagation Delay Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Temperature Grade Terminal Finish Terminal Form

LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK 1

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50 MHz 1

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NO 1

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S-CQCC-J68 1

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e0 1

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NO 1

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24.13 mm 1

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Manufacturer (1)

Altera Corporation 1

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Number of Dedicated Inputs (1)

7 1

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Number of I/O Lines (1)

52 1

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Number of Macro Cells (1)

128 1

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68 1

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70.0 °C 1

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0.0 °C 1

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7 DEDICATED INPUTS, 52 I/O 1

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MACROCELL 1

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CERAMIC, METAL-SEALED COFIRED 1

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WQCCJ 1

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LDCC68,1.0SQ 1

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Package Shape (1)

SQUARE 1

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CHIP CARRIER, WINDOW 1

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Obsolete 1

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No 1

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220 1

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Programmable Logic Type (1)

UV PLD 1

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Propagation Delay (1)

40 ns 1

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Not Qualified 1

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No 1

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5.08 mm 1

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5.25 V 1

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4.75 V 1

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Supply Voltage-Nom (1)

5 V 1

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YES 1

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CMOS 1

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Temperature Grade (1)

COMMERCIAL 1

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TIN LEAD 1

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J BEND 1

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