Parametric results for: HD74LV10AFPEL under Gates

All Filters Family JESD-30 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Moisture Sensitivity Level Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount Family (1)

LV/LV-A/LVX/H 2

2 hits Apply

R-PDSO-G14 2

2 hits Apply

10.06 mm 2

2 hits Apply

Load Capacitance (CL) (1)

50 pF 2

2 hits Apply

NAND GATE 2

2 hits Apply

Manufacturer (1)

Renesas Electronics Corporation 2

2 hits Apply

6 mA 2

2 hits Apply

1 1

2 hits Apply

Number of Functions (1)

3.0 2

2 hits Apply

Number of Inputs (1)

3 2

2 hits Apply

14 2

2 hits Apply

85.0 °C 2

2 hits Apply

-40.0 °C 2

2 hits Apply

PLASTIC/EPOXY 2

2 hits Apply

Package Code (1)

SOP 2

2 hits Apply

SOP14,.3 2

2 hits Apply

RECTANGULAR 2

2 hits Apply

SMALL OUTLINE 2

2 hits Apply

Prop. Delay@Nom-Sup (1)

13.5 ns 2

2 hits Apply

Propagation Delay (tpd) (1)

20.5 ns 2

2 hits Apply

Schmitt Trigger (1)

NO 2

2 hits Apply

Supply Voltage-Nom (Vsup) (1)

2.5 V 2

2 hits Apply

Surface Mount (1)

YES 2

2 hits Apply