Parametric results for: XC2VP20-5FF896I under Field Programmable Gate Arrays

All Filters Clock Frequency-Max Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Moisture Sensitivity Level Number of CLBs Number of Inputs Number of Logic Cells Number of Outputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Equivalence Code Package Shape Package Style Part Life Cycle Code Pbfree Code Peak Reflow Temperature (Cel) Programmable Logic Type Qualification Status Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Technology Terminal Finish Terminal Form

1.05 GHz 1

1 hit Apply

Combinatorial Delay of a CLB-Max (1)

360 ps 1

1 hit Apply

S-PBGA-B896 1

1 hit Apply

e0 1

1 hit Apply

31 mm 1

1 hit Apply

Manufacturer (1)

AMD Xilinx 1

1 hit Apply

4 1

1 hit Apply

Number of CLBs (1)

2320 1

1 hit Apply

Number of Inputs (1)

556 1

1 hit Apply

Number of Logic Cells (1)

20880 1

1 hit Apply

Number of Outputs (1)

556 1

1 hit Apply

896 1

1 hit Apply

100.0 °C 1

1 hit Apply

-40.0 °C 1

1 hit Apply

2320 CLBS 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

BGA 1

1 hit Apply

BGA896,30X30,40 1

1 hit Apply

Package Shape (1)

SQUARE 1

1 hit Apply

GRID ARRAY 1

1 hit Apply

Obsolete 1

1 hit Apply

No 1

1 hit Apply

225 1

1 hit Apply

Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

1 hit Apply

Not Qualified 1

1 hit Apply

No 1

1 hit Apply

3.4 mm 1

1 hit Apply

1.575 V 1

1 hit Apply

1.425 V 1

1 hit Apply

Supply Voltage-Nom (1)

1.5 V 1

1 hit Apply

YES 1

1 hit Apply

CMOS 1

1 hit Apply

Tin/Lead (Sn63Pb37) 1

1 hit Apply

BALL 1

1 hit Apply