7134LA55J8 vs 5962-8687513XA feature comparison

7134LA55J8 Integrated Device Technology Inc

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5962-8687513XA Temic Semiconductors

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Pbfree Code No
Rohs Code No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC TEMIC SEMICONDUCTORS
Part Package Code PLCC
Package Description PLASTIC, LCC-52 DIP-48
Pin Count 52
Manufacturer Package Code PL52
Reach Compliance Code compliant unknown
ECCN Code EAR99
HTS Code 8542.32.00.41
Access Time-Max 55 ns 90 ns
Additional Feature AUTOMATIC POWER-DOWN; BATTERY BACKUP INTERRUPT FLAG; AUTOMATIC POWER-DOWN
I/O Type COMMON
JESD-30 Code S-PQCC-J52 R-CDIP-T48
JESD-609 Code e0 e0
Length 19.1262 mm 60.96 mm
Memory Density 32768 bit 8192 bit
Memory IC Type MULTI-PORT SRAM MULTI-PORT SRAM
Memory Width 8 8
Moisture Sensitivity Level 3
Number of Functions 1 1
Number of Ports 2
Number of Terminals 52 48
Number of Words 4096 words 1024 words
Number of Words Code 4000 1000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 70 °C 125 °C
Operating Temperature-Min -55 °C
Organization 4KX8 1KX8
Output Characteristics 3-STATE
Package Body Material PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED
Package Code QCCJ DIP
Package Equivalence Code LDCC52,.8SQ
Package Shape SQUARE RECTANGULAR
Package Style CHIP CARRIER IN-LINE
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Cel) 225
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.57 mm 4.826 mm
Standby Current-Max 0.0015 A
Standby Voltage-Min 2 V
Supply Current-Max 0.2 mA
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount YES NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL MILITARY
Terminal Finish TIN LEAD TIN LEAD
Terminal Form J BEND THROUGH-HOLE
Terminal Pitch 1.27 mm 2.54 mm
Terminal Position QUAD DUAL
Time@Peak Reflow Temperature-Max (s) 20
Width 19.1262 mm 15.24 mm
Base Number Matches 2 1

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Compare 5962-8687513XA with alternatives