CA3240EZ
vs
CA3240E1
feature comparison
| Pbfree Code |
Yes
|
|
| Part Life Cycle Code |
Active
|
Obsolete
|
| Ihs Manufacturer |
RENESAS ELECTRONICS CORP
|
INTERSIL CORP
|
| Part Package Code |
PDIP
|
DIP
|
| Package Description |
DIP,
|
|
| Pin Count |
8
|
14
|
| Manufacturer Package Code |
E8.3
|
|
| Reach Compliance Code |
compliant
|
not_compliant
|
| ECCN Code |
EAR99
|
EAR99
|
| HTS Code |
8542.33.00.01
|
8542.33.00.01
|
| Date Of Intro |
2018-07-18
|
|
| Samacsys Manufacturer |
Renesas Electronics
|
|
| Amplifier Type |
OPERATIONAL AMPLIFIER
|
OPERATIONAL AMPLIFIER
|
| Common-mode Reject Ratio-Nom |
90 dB
|
|
| Input Offset Voltage-Max |
15000 µV
|
15000 µV
|
| JESD-30 Code |
R-PDIP-T8
|
R-PDIP-T14
|
| JESD-609 Code |
e3
|
e0
|
| Neg Supply Voltage Limit-Max |
-18 V
|
|
| Neg Supply Voltage-Nom (Vsup) |
-15 V
|
|
| Number of Functions |
2
|
2
|
| Number of Terminals |
8
|
14
|
| Operating Temperature-Max |
85 °C
|
85 °C
|
| Operating Temperature-Min |
-40 °C
|
-40 °C
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
DIP
|
DIP
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
IN-LINE
|
IN-LINE
|
| Packing Method |
TUBE
|
|
| Slew Rate-Nom |
9 V/us
|
|
| Supply Voltage Limit-Max |
18 V
|
18 V
|
| Supply Voltage-Nom (Vsup) |
15 V
|
|
| Surface Mount |
NO
|
NO
|
| Technology |
BIMOS
|
|
| Temperature Grade |
INDUSTRIAL
|
INDUSTRIAL
|
| Terminal Finish |
MATTE TIN
|
Tin/Lead (Sn/Pb)
|
| Terminal Form |
THROUGH-HOLE
|
THROUGH-HOLE
|
| Terminal Position |
DUAL
|
DUAL
|
| Unity Gain BW-Nom |
4500
|
|
| Base Number Matches |
1
|
2
|
| Rohs Code |
|
No
|
| Architecture |
|
VOLTAGE-FEEDBACK
|
| Bias Current-Max (IIB) @25C |
|
0.00005 µA
|
| Frequency Compensation |
|
YES
|
| Low-Bias |
|
YES
|
| Low-Offset |
|
NO
|
| Package Equivalence Code |
|
DIP14,.3
|
| Qualification Status |
|
Not Qualified
|
| Supply Current-Max |
|
12 mA
|
| Terminal Pitch |
|
2.54 mm
|
| Voltage Gain-Min |
|
20000
|
|
|
|
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