CD4502BK3
vs
DV4502BD
feature comparison
Rohs Code |
No
|
|
Part Life Cycle Code |
Obsolete
|
Obsolete
|
Ihs Manufacturer |
INTERSIL CORP
|
AVG SEMICONDUCTORS
|
Reach Compliance Code |
not_compliant
|
unknown
|
HTS Code |
8542.39.00.01
|
8542.39.00.01
|
Control Type |
ENABLE LOW
|
ENABLE LOW
|
JESD-30 Code |
R-XDFP-F16
|
R-PDSO-G16
|
JESD-609 Code |
e0
|
|
Load Capacitance (CL) |
50 pF
|
50 pF
|
Logic IC Type |
BUS DRIVER
|
BUS DRIVER
|
Max I(ol) |
0.00216 A
|
|
Number of Bits |
6
|
6
|
Number of Functions |
1
|
1
|
Number of Terminals |
16
|
16
|
Operating Temperature-Max |
125 °C
|
85 °C
|
Operating Temperature-Min |
-55 °C
|
-40 °C
|
Output Characteristics |
3-STATE
|
3-STATE
|
Output Polarity |
INVERTED
|
INVERTED
|
Package Body Material |
CERAMIC
|
PLASTIC/EPOXY
|
Package Code |
DFP
|
SOP
|
Package Equivalence Code |
FL16,.3
|
SOP16(UNSPEC)
|
Package Shape |
RECTANGULAR
|
RECTANGULAR
|
Package Style |
FLATPACK
|
SMALL OUTLINE
|
Prop. Delay@Nom-Sup |
380 ns
|
150 ns
|
Qualification Status |
Not Qualified
|
Not Qualified
|
Screening Level |
38535Q/M;38534H;883B
|
|
Surface Mount |
YES
|
YES
|
Technology |
CMOS
|
CMOS
|
Temperature Grade |
MILITARY
|
INDUSTRIAL
|
Terminal Finish |
Tin/Lead (Sn/Pb)
|
|
Terminal Form |
FLAT
|
GULL WING
|
Terminal Pitch |
1.27 mm
|
1.27 mm
|
Terminal Position |
DUAL
|
DUAL
|
Base Number Matches |
1
|
1
|
Part Package Code |
|
SOIC
|
Package Description |
|
SOP, SOP16(UNSPEC)
|
Pin Count |
|
16
|
Additional Feature |
|
WITH COMMON INHIBIT FOR ALL BITS
|
Family |
|
4000/14000/40000
|
Length |
|
9.9 mm
|
Number of Ports |
|
2
|
Propagation Delay (tpd) |
|
150 ns
|
Seated Height-Max |
|
1.75 mm
|
Supply Voltage-Max (Vsup) |
|
18 V
|
Supply Voltage-Min (Vsup) |
|
3 V
|
Supply Voltage-Nom (Vsup) |
|
5 V
|
Width |
|
3.9 mm
|
|
|
|
Compare CD4502BK3 with alternatives
Compare DV4502BD with alternatives