LP80C51BH-24 vs TSC87C52-25CA feature comparison

LP80C51BH-24 Intel Corporation

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TSC87C52-25CA Temic Semiconductors

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTEL CORP TEMIC SEMICONDUCTORS
Part Package Code DIP
Package Description DIP, DIP40,.6 DIP-40
Pin Count 40
Reach Compliance Code compliant unknown
HTS Code 8542.31.00.01
Has ADC NO NO
Additional Feature BOOLEAN PROCESSOR; ON-CIRCUIT EMULATION
Address Bus Width 16 16
Bit Size 8 8
CPU Family 8051 8051
Clock Frequency-Max 24 MHz 25 MHz
DAC Channels NO NO
DMA Channels NO NO
External Data Bus Width 8 8
JESD-30 Code R-PDIP-T40 R-PDIP-T40
Length 52.26 mm
Number of I/O Lines 32 32
Number of Terminals 40 40
On Chip Program ROM Width 8 8
Operating Temperature-Max 85 °C 70 °C
Operating Temperature-Min -40 °C
PWM Channels NO NO
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP40,.6 DIP40,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Qualification Status Not Qualified Not Qualified
RAM (bytes) 128 256
ROM (words) 4096 8192
ROM Programmability MROM OTPROM
Seated Height-Max 5.08 mm
Speed 24 MHz 25 MHz
Supply Current-Max 40 mA 36.25 mA
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 5 V 5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade INDUSTRIAL COMMERCIAL
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 15.24 mm
uPs/uCs/Peripheral ICs Type MICROCONTROLLER MICROCONTROLLER
Base Number Matches 1 2
Rohs Code No
JESD-609 Code e0
Terminal Finish TIN LEAD

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Compare TSC87C52-25CA with alternatives