MR80C32U-36 vs ID80C52UFXXX-36 feature comparison

MR80C32U-36 Matra MHS

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ID80C52UFXXX-36 Matra MHS

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer MATRA MHS MATRA MHS
Reach Compliance Code unknown unknown
ECCN Code 3A991.A.2 3A991.A.2
HTS Code 8542.31.00.01 8542.31.00.01
Has ADC NO NO
Additional Feature BOOLEAN PROCESSOR BOOLEAN PROCESSOR; ROM PROTECT
Address Bus Width 16 16
Bit Size 8 8
Boundary Scan NO NO
Clock Frequency-Max 36 MHz 36 MHz
DAC Channels NO NO
DMA Channels NO NO
External Data Bus Width 8 8
Format FIXED POINT FIXED POINT
Integrated Cache NO NO
JESD-30 Code S-CQCC-N44 R-GDIP-T40
Low Power Mode YES YES
Number of DMA Channels
Number of External Interrupts 2 2
Number of I/O Lines 32 32
Number of Serial I/Os 1 1
Number of Terminals 44 40
Number of Timers 3 3
On Chip Data RAM Width 8 8
Operating Temperature-Max 125 °C 85 °C
Operating Temperature-Min -55 °C -40 °C
PWM Channels NO NO
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED
Package Code QCCN DIP
Package Shape SQUARE RECTANGULAR
Package Style CHIP CARRIER IN-LINE
Qualification Status Not Qualified Not Qualified
RAM (words) 256 256
ROM (words) 0 8192
ROM Programmability ROM LESS MROM
Speed 36 MHz 36 MHz
Supply Current-Max 54 mA 54 mA
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 4.5 V 5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount YES NO
Technology CMOS CMOS
Temperature Grade MILITARY INDUSTRIAL
Terminal Form NO LEAD THROUGH-HOLE
Terminal Position QUAD DUAL
uPs/uCs/Peripheral ICs Type MICROCONTROLLER MICROCONTROLLER
Base Number Matches 1 1
On Chip Program ROM Width 8

Compare MR80C32U-36 with alternatives

Compare ID80C52UFXXX-36 with alternatives