Part Details for SN74LVC112ADB by Texas Instruments
Results Overview of SN74LVC112ADB by Texas Instruments
- Distributor Offerings: (1 listing)
- Number of FFF Equivalents: (0 replacements)
- Tariff Estimator: (Available) NEW
- Number of Functional Equivalents: (0 options)
- CAD Models: (Request Part)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
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SN74LVC112ADB Information
SN74LVC112ADB by Texas Instruments is an FF/Latch.
FF/Latches are under the broader part category of Logic Components.
Digital logic governs the behavior of signals in electronic circuits, enabling complex decisions based on simple binary inputs (yes/no). Logic components perform operations from these signals. Read more about Logic Components on our Logic part category page.
Price & Stock for SN74LVC112ADB
| Part # | Distributor | Description | Stock | Price | Buy | |
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Vyrian | J-K Flip-Flop, 2-Func, Negative Edge Triggered, CMOS, PDSO16 | 3725 |
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RFQ |
US Tariff Estimator: SN74LVC112ADB by Texas Instruments
Calculations from this tool are estimations only for imports into the United States. Please refer to the distributor or manufacturer and reference official US government sources and authorities to verify any final purchase costs.
Part Details for SN74LVC112ADB
SN74LVC112ADB Part Data Attributes
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SN74LVC112ADB
Texas Instruments
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Datasheet
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SN74LVC112ADB
Texas Instruments
J-K Flip-Flop, 2-Func, Negative Edge Triggered, CMOS, PDSO16
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| Rohs Code | Yes | |
| Part Life Cycle Code | Obsolete | |
| Package Description | Sop-16 | |
| HTS Code | 8542.39.00.60 | |
| Family | Lvc/Lcx/Z | |
| JESD-30 Code | R-PDSO-G16 | |
| Length | 6.2 Mm | |
| Load Capacitance (CL) | 50 Pf | |
| Logic IC Type | J-K Flip-Flop | |
| Max Frequency@Nom-Sup | 150000000 Hz | |
| Max I(ol) | 0.024 A | |
| Number of Bits | 2 | |
| Number of Functions | 2 | |
| Number of Terminals | 16 | |
| Operating Temperature-Max | 85 °C | |
| Operating Temperature-Min | -40 °C | |
| Output Polarity | Complementary | |
| Package Body Material | Plastic/Epoxy | |
| Package Code | SSOP | |
| Package Equivalence Code | SSOP16,.3 | |
| Package Shape | Rectangular | |
| Package Style | Small Outline, Shrink Pitch | |
| Prop. Delay@Nom-Sup | 5.9 Ns | |
| Propagation Delay (tpd) | 5.9 Ns | |
| Qualification Status | Not Qualified | |
| Seated Height-Max | 2 Mm | |
| Supply Voltage-Max (Vsup) | 3.6 V | |
| Supply Voltage-Min (Vsup) | 2.7 V | |
| Supply Voltage-Nom (Vsup) | 3.3 V | |
| Surface Mount | Yes | |
| Technology | Cmos | |
| Temperature Grade | Industrial | |
| Terminal Form | Gull Wing | |
| Terminal Pitch | 0.635 Mm | |
| Terminal Position | Dual | |
| Trigger Type | Negative Edge | |
| Width | 5.3 Mm | |
| fmax-Min | 150 Mhz |